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MM74HC374N_NL PDF预览

MM74HC374N_NL

更新时间： 2024-10-28 13:11:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
7页 92K
描述
Bus Driver, HC/UH Series, 1-Func, 8-Bit, True Output, CMOS, PDIP20, 0.300 INCH, MS-001, PLASTIC, DIP-20

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中文翻译

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MM74HC374N_NL 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP20,.3
针数：20Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.16
系列：HC/UHJESD-30 代码：R-PDIP-T20
JESD-609代码：e3长度：26.075 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：24000000 Hz最大I（ol）：0.006 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP20,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT APPLICABLE
电源：2/6 V传播延迟（tpd）：288 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：FF/Latches最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：4.5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT APPLICABLE
触发器类型：POSITIVE EDGE宽度：7.62 mm
Base Number Matches：1

MM74HC374N_NL 数据手册

 浏览型号MM74HC374N_NL的Datasheet PDF文件第2页浏览型号MM74HC374N_NL的Datasheet PDF文件第3页浏览型号MM74HC374N_NL的Datasheet PDF文件第4页浏览型号MM74HC374N_NL的Datasheet PDF文件第5页浏览型号MM74HC374N_NL的Datasheet PDF文件第6页浏览型号MM74HC374N_NL的Datasheet PDF文件第7页 
September 1983  
Revised February 1999  
MM74HC374  
3-STATE Octal D-Type Flip-Flop  
signals are present at the other inputs and the state of the  
storage elements.  
General Description  
The MM74HC374 high speed Octal D-Type Flip-Flops uti-  
lize advanced silicon-gate CMOS technology. They pos-  
sess the high noise immunity and low power consumption  
of standard CMOS integrated circuits, as well as the ability  
to drive 15 LS-TTL loads. Due to the large output drive  
capability and the 3-STATE feature, these devices are ide-  
ally suited for interfacing with bus lines in a bus organized  
system.  
The 74HC logic family is speed, function, and pinout com-  
patible with the standard 74LS logic family. All inputs are  
protected from damage due to static discharge by internal  
diode clamps to VCC and ground.  
Features  
■ Typical propagation delay: 20 ns  
These devices are positive edge triggered flip-flops. Data  
at the D inputs, meeting the setup and hold time require-  
ments, are transferred to the Q outputs on positive going  
transitions of the CLOCK (CK) input. When a high logic  
level is applied to the OUTPUT CONTROL (OC) input, all  
outputs go to a high impedance state, regardless of what  
■ Wide operating voltage range: 2–6V  
■ Low input current: 1 µA maximum  
■ Low quiescent current: 80 µA maximum  
■ Compatible with bus-oriented systems  
■ Output drive capability: 15 LS-TTL loads  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74HC374WM  
MM74HC374SJ  
MM74HC374MTC  
MM74HC374N  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Output  
Clock  
Data  
Output  
Control  
L
L
↑
↑
H
L
H
L
L
L
X
X
X
Q0  
Z
H
H = HIGH Level  
L = LOW Level  
X = Don't Care  
↑ = Transition from LOW-to-HIGH  
Z = High Impedance State  
Q
= The level of the output before steady state input conditions were  
0
established  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005336.prf  
www.fairchildsemi.com  
1234567

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MM74HC374N_NL 替代型号

型号 品牌 替代类型 描述 数据表
MC74HC374ANG ONSEMI

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