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MM74HC368WM PDF预览

MM74HC368WM

更新时间: 2024-11-25 12:59:11
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
9页 185K
描述
IC HC/UH SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, SO-16, Bus Driver/Transceiver

MM74HC368WM 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:SOP, SOP16,.4Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.85
Is Samacsys:N其他特性:ONE FUNCTION WITH TWO BITS
控制类型:ENABLE LOW系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:10.3 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER位数:6
功能数量:1端口数量:2
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
传播延迟(tpd):24 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

MM74HC368WM 数据手册

 浏览型号MM74HC368WM的Datasheet PDF文件第2页浏览型号MM74HC368WM的Datasheet PDF文件第3页浏览型号MM74HC368WM的Datasheet PDF文件第4页浏览型号MM74HC368WM的Datasheet PDF文件第5页浏览型号MM74HC368WM的Datasheet PDF文件第6页浏览型号MM74HC368WM的Datasheet PDF文件第7页 
January 1988  
MM54HC365/MM74HC365 Hex TRI-STATE Buffer  
É
MM54HC366/MM74HC366 Inverting Hex TRI-STATE Buffer  
MM54HC367/MM74HC367 Hex TRI-STATE Buffer  
MM54HC368/MM74HC368 Inverting Hex TRI-STATE Buffer  
General Description  
These TRI-STATE buffers are general purpose high speed  
inverting and non-inverting buffers that utilize advanced sili-  
con-gate CMOS technology. They have high drive current  
outputs which enable high speed operation even when driv-  
ing large bus capacitances. These circuits possess the low  
power dissipation of CMOS circuitry, yet have speeds com-  
parable to low power Schottky TTL circuits. All 4 circuits are  
capable of driving up to 15 low power Schottky inputs.  
six gates. The MM54/74HC367 and the MM54/74HC368  
also have two output enables, but one enable (G1) controls  
4 gates and the other (G2) controls the remaining 2 gates.  
All inputs are protected from damage due to static dis-  
and ground.  
charge by diodes to V  
CC  
Features  
Y
Typical propagation delay: 15 ns  
The MM54/74HC366 and the MM54/74HC368 are inverting  
buffers, where as the MM54/74HC365 and the MM54/  
74HC367 are non-inverting buffers. The MM54/74HC365  
and the MM54/74HC366 have two TRI-STATE control in-  
puts (G1 and G2) which are NORed together to control all  
Y
Y
Y
Y
Wide operating voltage range: 2V6V  
Low input current: 1 mA maximum  
Low quiescent current: 80 mA maximum (74 Series)  
Output drive capability: 15 LS-TTL loads  
Connection Diagrams  
Dual-In-Line Packages/Top Views  
TL/F/5209–1  
TL/F/5209–2  
Order Number MM54HC365 or MM74HC365  
Order Number MM54HC366 or MM74HC366  
TL/F/5209–3  
TL/F/5209–4  
Order Number MM54HC367 or MM74HC367  
Order Number MM54HC368 or MM74HC368  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/5209  
RRD-B30M105/Printed in U. S. A.  

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