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MM74HC32N_NL PDF预览

MM74HC32N_NL

更新时间: 2024-11-02 05:08:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 85K
描述
Quad 2-Input OR Gate

MM74HC32N_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-14
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.14
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDIP-T14JESD-609代码:e3
长度:19.18 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE最大I(ol):0.004 A
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:RAIL峰值回流温度(摄氏度):NOT APPLICABLE
电源:2/6 VProp。Delay @ Nom-Sup:25 ns
传播延迟(tpd):125 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:7.62 mmBase Number Matches:1

MM74HC32N_NL 数据手册

 浏览型号MM74HC32N_NL的Datasheet PDF文件第2页浏览型号MM74HC32N_NL的Datasheet PDF文件第3页浏览型号MM74HC32N_NL的Datasheet PDF文件第4页浏览型号MM74HC32N_NL的Datasheet PDF文件第5页浏览型号MM74HC32N_NL的Datasheet PDF文件第6页浏览型号MM74HC32N_NL的Datasheet PDF文件第7页 
September 1983  
Revised January 2005  
MM74HC32  
Quad 2-Input OR Gate  
General Description  
Features  
The MM74HC32 OR gates utilize advanced silicon-gate  
CMOS technology to achieve operating speeds similar to  
LS-TTL gates with the low power consumption of standard  
CMOS integrated circuits. All gates have buffered outputs  
providing high noise immunity and the ability to drive 10  
LS-TTL loads. The 74HC logic family is functionally as well  
as pin-out compatible with the standard 74LS logic family.  
All inputs are protected from damage due to static dis-  
charge by internal diode clamps to VCC and ground.  
Typical propagation delay: 10 ns  
Wide power supply range: 2–6V  
Low quiescent current: 20 µA maximum (74HC Series)  
Low input current: 1 µA maximum  
Fanout of 10 LS-TTL loads  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
MM74HC32M  
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
MM74HC32MX_NL  
MM74HC32SJ  
MM74HC32MTC  
MM74HC32MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
MM74HC32N  
N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
MM74HC32N_NL  
N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Connection Diagram  
Logic Diagram  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Y = A + B  
(1 of 4)  
Top View  
© 2005 Fairchild Semiconductor Corporation  
DS005132  
www.fairchildsemi.com  

MM74HC32N_NL 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC32N TI

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