MM74HC280M/A+

更新时间： 2024-11-02 13:11:39

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
4页	114K
描述
IC,PARITY GENERATOR/CHECKER,HC-CMOS,SOP,14PIN,PLASTIC

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中文翻译

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技术参数
数据手册

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MM74HC280M/A+ 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	风险等级：	5.92
Is Samacsys：	N	JESD-30 代码：	R-PDSO-G14
JESD-609代码：	e0	逻辑集成电路类型：	PARITY GENERATOR/CHECKER
端子数量：	14	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP14,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
电源：	2/6 V	子类别：	Arithmetic Circuits
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

MM74HC280M/A+ 数据手册

January 1988

MM54HC280/MM74HC280

9-Bit Odd/Even Parity Generator/Checker

General Description

Features

The MM54HC280/MM74HC280 utilizes advanced silicon-

gate CMOS technology to achieve the high noise immunity

and low power consumption of standard CMOS integrated

circuits. It possesses the ability to drive 10 LS-TTL loads.

Typical propagation delay: 28 ns

Wide power supply range: 2V–6V

Low quiescent current: 80 mA maximum (74HC)

Low input current: 1 mA maximum

Fanout of 10 LS-TTL loads

This parity generator/checker features odd/even outputs to

facilitate operation of either odd or even parity applications.

The word length capability is easily expanded by cascading

devices. The 54HC/74HC logic family is speed, function,

and pinout compatible with the standard 54LS/74LS family.

All inputs are protected from damage due to static dis-

charge by internal diode clamps to V

and ground.

Connection Diagram

Dual-In-Line Package

TL/F/5121–1

Order Number MM54HC280 or MM74HC280

Function Table

Numbers of Inputs A

Outputs

thru 1 that are High

R Even

R Odd

0, 2, 4, 6, 8

1, 3, 5, 7, 9

low level

high level,

1995 National Semiconductor Corporation

TL/F/5121

RRD-B30M105/Printed in U. S. A.

12 3 4

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与MM74HC280M/A+相关器件

型号	品牌	获取价格	描述	数据表
MM74HC280MX	TI	获取价格	HC/UH SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDSO14, PLASTIC, SO-14
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