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MM74HC243M/A+ PDF预览

MM74HC243M/A+

更新时间: 2024-02-03 18:41:15
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 128K
描述
IC,BUS TRANSCEIVER,SINGLE,4-BIT,HC-CMOS,SOP,14PIN,PLASTIC

MM74HC243M/A+ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP14,.3Reach Compliance Code:unknown
风险等级:5.92控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONALJESD-30 代码:R-PDIP-T14
JESD-609代码:e0位数:4
功能数量:1端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:2/6 V
认证状态:Not Qualified子类别:Bus Driver/Transceivers
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

MM74HC243M/A+ 数据手册

 浏览型号MM74HC243M/A+的Datasheet PDF文件第2页浏览型号MM74HC243M/A+的Datasheet PDF文件第3页浏览型号MM74HC243M/A+的Datasheet PDF文件第4页浏览型号MM74HC243M/A+的Datasheet PDF文件第5页浏览型号MM74HC243M/A+的Datasheet PDF文件第6页 
January 1988  
MM54HC242/MM74HC242  
Inverting Quad TRI-STATE Transceiver  
MM54HC243/MM74HC243 Quad TRI-STATE Transceiver  
É
General Description  
These TRI-STATE bidirectional inverting and non-inverting  
buffers utilize advanced silicon-gate CMOS technology and  
are intended for two-way asynchronous communication be-  
tween data buses. They have high drive current outputs  
which enable high speed operation when driving large bus  
capacitances. These circuits possess the low power dissi-  
pation and high noise immunity associated with CMOS cir-  
cuits, but speeds comparable to low power Schottky TTL  
circuits. They can also drive 15 LS-TTL loads.  
GAB enables the B outputs. This device does not have  
Schmitt trigger inputs.  
All inputs are protected from damage due to static dis-  
and ground.  
charge by diodes to V  
CC  
Features  
Y
Typical propagation delay: 12 ns  
Y
Y
Y
Y
Y
TRI-STATE outputs  
Two way asynchronous communication  
High output current: 6 mA (74HC)  
Wide power supply range: 26V  
Low quiescent supply current: 80 mA (74HC)  
The MM54HC243/MM74HC243 is a non-inverting buffer  
and the MM54HC242/MM74HC242 is an inverting buffer.  
Each device has one active high enable (GBA), and one  
active low enable (GAB). GBA enables the A outputs and  
Connection Diagrams  
Dual-In-Line Package  
Dual-In-Line Package  
TL/L/5019–1  
Top View  
Order Number MM54HC242 or MM74HC242  
TL/L/5019–2  
Top View  
Order Number MM54HC243 or MM74HC243  
Truth Tables  
’HC242  
’HC243  
Control Inputs  
Data Port Status  
Control Inputs  
Data Port Status  
GAB  
GBA  
A
B
GAB  
GBA  
A
B
H
L
H
H
L
OUTPUT  
Isolated  
Isolated  
Input  
Input  
H
L
H
H
L
OUTPUT  
Isolated  
Isolated  
Input  
Input  
Isolated  
Isolated  
OUTPUT  
Isolated  
Isolated  
OUTPUT  
H
L
H
L
L
L
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.  
C
1995 National Semiconductor Corporation  
TL/L/5019  
RRD-B30M115/Printed in U. S. A.  

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