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MM74HC20J/A+ PDF预览

MM74HC20J/A+

更新时间: 2024-11-11 13:11:39
品牌 Logo 应用领域
美国国家半导体 - NSC
页数 文件大小 规格书
4页 126K
描述
IC,LOGIC GATE,DUAL 4-INPUT NAND,HC-CMOS,DIP,14PIN,CERAMIC

MM74HC20J/A+ 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:DIP, DIP14,.3Reach Compliance Code:unknown
风险等级:5.92Is Samacsys:N
JESD-30 代码:R-XDIP-T14JESD-609代码:e0
逻辑集成电路类型:NAND GATE端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:2/6 V
施密特触发器:NO子类别:Gates
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

MM74HC20J/A+ 数据手册

 浏览型号MM74HC20J/A+的Datasheet PDF文件第2页浏览型号MM74HC20J/A+的Datasheet PDF文件第3页浏览型号MM74HC20J/A+的Datasheet PDF文件第4页 
January 1988  
MM54HC20/MM74HC20  
Dual 4-Input NAND Gate  
General Description  
Features  
Y
These NAND gates utilize advanced silicon-gate CMOS  
technology to achieve operating speeds similar to LS-TTL  
gates with the low power consumption of standard CMOS  
integrated circuits. All gates have buffered outputs. All de-  
vices have high noise immunity and the ability to drive 10  
LS-TTL loads. The 54HC/74HC logic family is functionally  
as well as pin-out compatible with the standard 54LS/74LS  
logic family. All inputs are protected from damage due to  
Typical propagation delay: 8 ns  
Y
Wide power supply range: 26V  
Y
Low quiescent current: 20 mA maximum (74HC Series)  
Low input current: 1 mA maximum  
Y
Y
Fanout of 10 LS-TTL loads  
static discharge by internal diode clamps to  
ground.  
V
CC  
and  
Connection and Logic Diagrams  
Dual-In-Line Package  
TL/F/5299–1  
Top View  
Order Number MM54HC20 or MM74HC20  
TL/F/5299–2  
C
1995 National Semiconductor Corporation  
TL/F/5299  
RRD-B30M105/Printed in U. S. A.  

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