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MM74HC133N

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MM74HC133N 技术参数

January 1988

MM54HC133/MM74HC133 13-Input NAND Gate

General Description

Features

Typical propagation delay: 20 ns

This NAND gate utilizes advanced silicon-gate CMOS tech-

nology to achieve operating speeds similar to LS-TTL gates

with the low power consumption of standard CMOS inte-

grated circuits. All gates have buffered outputs. All devices

have high noise immunity and the ability to drive 10 LS-TTL

loads. The 54HC/74HC logic family is functionally as well as

pin-out compatible with the standard 54LS/74LS logic fami-

ly. All inputs are protected from damage due to static dis-

Wide power supply range: 2–6V

Low quiescent current: 20 mA maximum (74HC Series)

Low input current: 1 mA maximum

Fanout of 10 LS-TTL loads

charge by internal diode clamps to V

and ground.

Connection and Logic Diagrams

Dual-In-Line Package

TL/F/5134–1

Top View

Order Number MM54HC133 or MM74HC133

TL/F/5134–2

1995 National Semiconductor Corporation

TL/F/5134

RRD-B30M105/Printed in U. S. A.

12 3 4

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型号	品牌	获取价格	描述	数据表
MM74HC133N/A+	TI	获取价格	IC,LOGIC GATE,13-INPUT NAND,HC-CMOS,DIP,16PIN,PLASTIC
MM74HC133N/B+	TI	获取价格	IC,LOGIC GATE,13-INPUT NAND,HC-CMOS,DIP,16PIN,PLASTIC
MM74HC137	NSC	获取价格	3-to-8 Line Decoder With Address Latches (Inverted Output)
MM74HC137J	NSC	获取价格	3-to-8 Line Decoder With Address Latches (Inverted Output)
MM74HC137J/A+	TI	获取价格	IC,DECODER/DEMUX,3-TO-8-LINE,HC-CMOS,DIP,16PIN,CERAMIC
MM74HC137M	NSC	获取价格	IC HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, SO-16, Decoder/Dr
MM74HC137MX	TI	获取价格	HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, SO-16
MM74HC137N	NSC	获取价格	3-to-8 Line Decoder With Address Latches (Inverted Output)
MM74HC137N/B+	TI	获取价格	IC,DECODER/DEMUX,3-TO-8-LINE,HC-CMOS,DIP,16PIN,PLASTIC
MM74HC138	FAIRCHILD	获取价格	3-to-8 Line Decoder