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MM74HC132MX_NL PDF预览

MM74HC132MX_NL

更新时间: 2024-11-24 13:11:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
6页 82K
描述
NAND Gate, HC/UH Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012, SOIC-14

MM74HC132MX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.13
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.6235 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.004 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/6 VProp。Delay @ Nom-Sup:37 ns
传播延迟(tpd):125 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:1.753 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

MM74HC132MX_NL 数据手册

 浏览型号MM74HC132MX_NL的Datasheet PDF文件第2页浏览型号MM74HC132MX_NL的Datasheet PDF文件第3页浏览型号MM74HC132MX_NL的Datasheet PDF文件第4页浏览型号MM74HC132MX_NL的Datasheet PDF文件第5页浏览型号MM74HC132MX_NL的Datasheet PDF文件第6页 
September 1983  
Revised February 1999  
MM74HC132  
Quad 2-Input NAND Schmitt Trigger  
General Description  
Features  
The MM74HC132 utilizes advanced silicon-gate CMOS  
technology to achieve the low power dissipation and high  
noise immunity of standard CMOS, as well as the capability  
to drive 10 LS-TTL loads.  
Typical propagation delay: 12 ns  
Wide power supply range: 2V–6V  
Low quiescent current: 20 µA maximum (74HC Series)  
Low input current: 1 µA maximum  
The 74HC logic family is functionally and pinout compatible  
with the standard 74LS logic family. All inputs are protected  
from damage due to static discharge by internal diode  
clamps to VCC and ground.  
Fanout of 10 LS-TTL loads  
Typical hysteresis voltage: 0.9V at VCC=4.5V  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74HC132M  
MM74HC132SJ  
MM74HC132MTC  
MM74HC132N  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A.)  
Connection Diagram  
Logic Diagram  
Pin Assignment for DIP, SOIC, SOP, and TSSOP  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005309.prf  
www.fairchildsemi.com  

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