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MM74C240J PDF预览

MM74C240J

更新时间: 2024-11-30 22:46:07
品牌 Logo 应用领域
美国国家半导体 - NSC 总线驱动器总线收发器逻辑集成电路
页数 文件大小 规格书
6页 144K
描述
Octal Buffers and Line Drivers with TRI-STATE Outputs

MM74C240J 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:DIP, DIP20,.3Reach Compliance Code:unknown
风险等级:5.62Is Samacsys:N
其他特性:DISABLE & ENABLE TIME @RL=1K控制类型:ENABLE LOW
系列:CMOSJESD-30 代码:R-GDIP-T20
JESD-609代码:e0长度:24.51 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.0022 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
Prop。Delay @ Nom-Sup:90 ns传播延迟(tpd):110 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

MM74C240J 数据手册

 浏览型号MM74C240J的Datasheet PDF文件第2页浏览型号MM74C240J的Datasheet PDF文件第3页浏览型号MM74C240J的Datasheet PDF文件第4页浏览型号MM74C240J的Datasheet PDF文件第5页浏览型号MM74C240J的Datasheet PDF文件第6页 
February 1988  
MM54C240/MM74C240 Inverting  
MM54C244/MM74C244 Non-Inverting  
Octal Buffers and Line Drivers with TRI-STATE Outputs  
É
General Description  
Features  
Y
Wide supply voltage range (3V to 15V)  
These octal buffers and line drivers are monolithic comple-  
mentary MOS (CMOS) integrated circuits with TRI-STATE  
outputs. These outputs have been specially designed to  
drive highly capacitive loads such as bus-oriented systems.  
These devices have a fan out of 6 low power Schottky  
loads. A high logic level on the output disable control input  
G makes the outputs go into the high impedance state. For  
improved TTL input compatibility see MM74C941.  
Y
High noise immunity (0.45 V  
Low power consumption  
typ)  
CC  
Y
Y
Y
Y
Y
Y
Y
High capacitive load drive capability  
TRI-STATE outputs  
Input protection  
TTL compatibility  
20-pin dual-in-line package  
@
High speed 25 ns (typ.)  
10V, 50 pF (MM74C244)  
Logic and Connection Diagrams  
MM54C240/MM74C240  
MM54C240/MM74C240 Dual-In-Line Package  
TL/F/5905–2  
TL/F/5905–1  
Top View  
Order Number MM54C240 or MM74C240  
MM54C244/MM74C244  
MM54C244/MM74C244 Dual-In-Line Package  
TL/F/5905–4  
TL/F/5905–3  
Top View  
Order Number MM54C244 or MM74C244  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/5905  
RRD-B30M105/Printed in U. S. A.  

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