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ML87V2103GA PDF预览

ML87V2103GA

更新时间: 2024-01-28 03:02:37
品牌 Logo 应用领域
冲电气 - OKI 消费电路商用集成电路
页数 文件大小 规格书
14页 127K
描述
Consumer Circuit, PQFP100, 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100

ML87V2103GA 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:QFP,针数:100
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.7商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PQFP-G100长度:20 mm
功能数量:1端子数量:100
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装形状:RECTANGULAR封装形式:FLATPACK
认证状态:Not Qualified座面最大高度:3 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
表面贴装:YES温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD宽度:14 mm
Base Number Matches:1

ML87V2103GA 数据手册

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PEDL87V2103DIGEST-01  
Issue Date: Jan. 20, 2003  
OKI Semiconductor  
ML87V2103  
Preliminary  
Video Signal Noise Reduction and Rate Conversion IC with a Built-in 3.9 Mbit Field Memory  
GENERAL DESCRIPTION  
The ML87V2103 comprises a 3.9 Mbit field memory and logic circuits for signal processing and memory control.  
The device can reduce field-recursive noise and double the conversion speed.  
There is an automatic noise reduction mode that detects the noise level in the input video data to set the optimum  
noise reduction.  
There are two ways to double the conversion speed: progressive conversion that doubles the number of lines by  
doubling the horizontal direction frequency and flicker-free conversion that doubles both the vertical and  
horizontal direction frequencies.  
FEATURES  
Built-in memory:  
3.9 Mbit filed memory × 1 unit  
Maximum input operating frequencies (16 bits/8 bits, ITU-R BT.656):  
14.75/29.5 MHz  
Maximum output operating frequency:  
29.5 MHz (double-speed conversion)  
Power supply voltage :  
3.3 V ± 0.3 V  
Input pin:  
TTL-5V tolerant (5 V withstand voltage)  
Input/output pins:  
Input TTL- output LVCMOS-5V tolerant (5 V withstand voltage)  
Output pin:  
LVCMOS (3.3 V)  
Input data format:  
YCbCr (8 bits (Y) + 8 bits (CbCr)) (4:2:2)  
YCbCr (8 bits (YCbCr)) (4:2:2)  
ITU-R BT.656 (8 bits (YCbCr))  
Output data format:  
YCbCr (8 bits (Y) + 8 bits (CbCr)) (4:2:2)  
Serial bus:  
I2C-bus interface: (Standard mode: 100 kbps/Fast mode: 400 kbps)  
Internal memory controller:  
Input:  
Compatible with 625/50 Hz 2:1, 525/60 Hz 2:1  
Output: Compatible with 625/50 Hz 2:1, 525/60 Hz 2:1,  
625/50 Hz 1:1, 525/60 Hz 1:1,  
625/100 Hz 2:1, 525/120 Hz 2:1  
Compatible horizontal effective pixels: 640 (525 line mode only), 720, 768  
Sync generator (for output):  
Can generate sync signals of 625/50 Hz 2:1, 525/60 Hz 2:1,  
625/50 Hz 1:1, 525/60 Hz 1:1,  
625/100 Hz 2:1, 525/120 Hz 2:1.  
Compatible horizontal effective pixels: 640 (525 line mode only), 720, 768  
Field-recursive noise reduction:  
Noise detection and subtraction (with horizontal motion compensation)  
Automatic noise reduction mode  
1/14  

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