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ML62Q1563C

更新时间: 2024-11-29 11:08:15
品牌 Logo 应用领域
罗姆 - ROHM /
页数 文件大小 规格书
57页 2331K
描述
标准型 ML62Q1500组 ROM容量:32KB to 256KB

ML62Q1563C 数据手册

 浏览型号ML62Q1563C的Datasheet PDF文件第2页浏览型号ML62Q1563C的Datasheet PDF文件第3页浏览型号ML62Q1563C的Datasheet PDF文件第4页浏览型号ML62Q1563C的Datasheet PDF文件第5页浏览型号ML62Q1563C的Datasheet PDF文件第6页浏览型号ML62Q1563C的Datasheet PDF文件第7页 
FEDL62Q1500C-03  
Issue Date: May19, 2022  
ML62Q1500C Group  
16-bit micro controller  
GENERAL DESCRIPTION  
ML62Q1500C Group is a high performance CMOS 16-bit microcontroller equipped with an 16-bit CPU nX-U16/100 and  
integrated with program memory (Flash memory), data memory (RAM), data Flash and rich peripheral functions such as the  
multiplier/divider, CRC generator, DMA controller, Clock generator, Simplified RTC, Timer, General Purpose Ports, UART,  
Synchronous serial port, I2C bus interface unit (Master, Slave), Buzzer, Voltage Level Supervisor (VLS), Successive  
approximation type A/D converter, D/A converter, Analog comparator, Safety function (IEC60730/60335 Class B), and so on.  
The CPU nX-U16/100 is capable of efficient instruction execution in 1-intruction 1-clock mode by pipeline architecture parallel  
processing.  
The built-in on-chip debug function enables debugging and programming the software. Also, ISP (In-System Programming)  
function supports the Flash programming in production line.  
The ML62Q1500C Group has five packages (52pin - 80pin) and ten kinds of memory sizes (96Kbyte - 128Kbyte).  
Table 1 ML62Q1500C Group Product List  
52pin  
TQFP52  
64pin  
QFP64  
TQFP64  
80pin  
QFP80  
Program  
memory  
Data memory  
(RAM)  
Data Flash  
4KByte  
128Kbyte  
96Kbyte  
ML62Q1544C ML62Q1554C ML62Q1564C  
ML62Q1543C ML62Q1553C ML62Q1563C  
8Kbyte  
Please see the page 58 “Notes for product usage” and the page 59 “Notes” in this document on use with this ML62Q1500C group.  
FEATURES  
CPU  
16-bit RISC CPU: nX-U16/100(A35 core)  
Instruction system: 16-bit length instructions  
Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations,  
bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on  
Built-in On-chip debug function  
Built-in ISP (In-System Programming) function  
Minimum instruction execution time  
Approximately 30.5 μs (at 32.768 kHz system clock)  
Approximately 62.5ns/41.6ns (at 16 MHz/24MHz system clock)  
1/57  

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