Datasheet > ML145428-6P

ML145428-6P

更新时间： 2024-09-17 03:58:43

品牌	Logo	应用领域
LANSDALE		转换器
页数	文件大小	规格书
14页	1343K
描述
Asynchronous-to-Synchronous and Synchronous-to-Asynchronous Converter

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ML145428-6P 数据手册

ML145428

Asynchronous–to–Synchronous

and Synchronous–to–

Asynchronous Converter

Legacy Device: Motorola MC145428

The ML145428 Data Set Interface provides asynchronous-to-synchronous

and synchronous-to-asynchronous data conversion. It is ideally suited for

voice/data digital telesets supplying an EIA-232 compatible data port into a

synchronous transmission link. Other applications include: data multiplexers,

concentrators, data-only switching, and PBX-based local area networks. This

low-power CMOS device directly interfaces with either the 64 kbps or 8kbps

channel of Motorola’s MC145422 and MC145426 Universal Digital Loop

Transceivers (UDLTs), as well as the MC145421 and MC145425 Second

Generation Universal Digital Loop Transceivers (UDLT II).

P DIP 20 = RP

PLASTIC

CASE 732

SOG 20 = -6P

PLASTIC

CASE 751D

CROSS REFERENCE/ORDERING INFORMATION

• Provides the Interface Between Asynchronous Data Ports and

Synchronous Transmission Lines

PACKAGE

MOTOROLA

LANSDALE

P DIP 20

SOG 20

MC145428P

MC145428DW

ML145428RP

ML145428-6P

• Up to 128 kbps Asynchronous Data Rate Operation

• Up to 2.1 Mbps Synchronous Data Rate Operation

• On-Board Bit Rate Clock Generator with Pin Selectable Bit Rates of

300, 1200, 1400, 4800, 9600, 19200 and 38400 bps or an Externally

Supplied 16 Times Bit Rate Clock

Note: Lansdale lead free (Pb) product, as it

becomes available, will be identified by a part

number prefix change from ML to MLE.

• Accepts Asynchronous Data Words of 8 or 9 Bits in Length

• False Start Detection Provided

• Automatic Sync Insertion and Checking

• Single 5 V Power Supply

• Low Power Consumption of 5 mW Typical

• Application Notes AN943 and AN946

PIN ASSIGNMENT

• Operating Temperature Range T = –40º to +85ºC.

TxS

TxD

19 RESET

18 DCO

17 DOE

16 CM

BLOCK DIAGRAM

BRCLK

BCLK

TxS

BR1

BR2

15 DCLK

14 DIE

SYNCHRONOUS

CHANNEL

TRANSMITTER

FIFO

DATA

STRIPPER

TxD

DCO

BR3

13 DCI

12 RxS

11 RxD

DOE

DIE

BR1-BR3

BCLK

BAUD

RATE

GEN

CONTROL

DCLK

BRCLK

RESET

DCI

SYNCHRONOUS

CHANNEL

RECEIVER

DATA

FORMATTER

FIFO

RxD

RxS

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