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MKE14Z256VLL7 PDF预览

MKE14Z256VLL7

更新时间: 2024-09-26 02:52:15
品牌 Logo 应用领域
恩智浦 - NXP 微控制器
页数 文件大小 规格书
92页 1385K
描述
Kinetis KE1xZ with up to 256 KB Flash Up to 72 MHz ARM® Cortex®-M0 Based Microcontroller

MKE14Z256VLL7 数据手册

 浏览型号MKE14Z256VLL7的Datasheet PDF文件第2页浏览型号MKE14Z256VLL7的Datasheet PDF文件第3页浏览型号MKE14Z256VLL7的Datasheet PDF文件第4页浏览型号MKE14Z256VLL7的Datasheet PDF文件第5页浏览型号MKE14Z256VLL7的Datasheet PDF文件第6页浏览型号MKE14Z256VLL7的Datasheet PDF文件第7页 
NXP Semiconductors  
Data Sheet: Technical Data  
KE1xZP100M72SF0  
Rev. 4.2, 03/2021  
Kinetis KE1xZ with up to 256 KB  
MKE1xZ256VLL7  
MKE1xZ256VLH7  
MKE1xZ128VLL7  
MKE1xZ128VLH7  
Flash  
Up to 72 MHz ARM® Cortex®-M0+ Based Microcontroller  
Kinetis KE1xZ256 MCUs are the leading parts for the KE1xZ  
familiy based on ARM® Cortex®-M0+ core. Providing up to 256  
KB flash, up to 32 KB RAM, and the complete set of analog/  
digital features, KE1xZ extends Kinetis E family to higher  
performance and broader scalability. Robust TSI provides high-  
level stability and accuracy to customer's HMI system. 1 Msps  
ADC and FlexTimer help build a perfect solution for BLDC motor  
control systems.  
100 LQFP (LL)  
14x14x1.4 mm P 0.5  
64 LQFP (LH)  
10x10x1.4 mm P 0.5  
Core Processor and System  
• ARM® Cortex®-M0+ core, supports up to 72 MHz  
frequency  
Memory and memory interfaces  
• Up to 256 KB program flash  
• Up to 32 KB SRAM  
• ARM Core based on the ARMv6 Architecture and  
• 32 KB FlexNVM for data flash and with EEPROM  
emulation  
Thumb®-2 ISA  
• Configurable Nested Vectored Interrupt Controller  
(NVIC)  
• 2 KB FlexRAM for EEPROM emulation  
• 128 Bytes flash cache  
• Memory-Mapped Divide and Square Root module  
(MMDVSQ)  
• 8-channel DMA controller extended up to 63 channels  
with DMAMUX  
• Boot ROM with built in bootloader  
Mixed-signal analog  
• 2× 12-bit analog-to-digital converter (ADC) with up  
to 16 channel analog inputs per module, up to 1  
Msps  
Reliability, safety and security  
• Flash Access Control (FAC)  
• 2× high-speed analog comparators (CMP) with  
internal 8-bit digital to analog converter (DAC); the  
8-bit DAC of CMP0 supports an output option to pad  
with a buffer  
• Cyclic Redundancy Check (CRC) generator module  
• 128-bit unique identification (ID) number  
• Internal watchdog (WDOG) with independent clock  
source  
Timing and control  
• External watchdog monitor (EWM) module  
• ADC self calibration feature  
• On-chip clock loss monitoring  
• 3× Flex Timers (FTM) for PWM generation, offering  
up to 8 standard channels  
• 1× 16-bit Low-Power Timer (LPTMR) with flexible  
wake up control  
Human-machine interface (HMI)  
• Supports up to 32 interrupt request (IRQ) sources  
• Up to 89 GPIO pins with interrupt functionality  
• Touch sensing input (TSI) module  
• 1× Programmable Delay Block (PDB) with flexible  
trigger system  
• 1× 32-bit Low-power Periodic Interrupt Timer (LPIT)  
with 4 channels  
• Real timer clock (RTC)  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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