Datasheet > MK74ZD133FLF

MK74ZD133FLF

更新时间： 2024-02-28 00:56:16

品牌	Logo	应用领域
艾迪悌 - IDT		驱动光电二极管逻辑集成电路
页数	文件大小	规格书
8页	116K
描述
PLL Based Clock Driver, ZD Series, 32 True Output(s), 0 Inverted Output(s), CMOS, PDSO56, 0.300 INCH, SSOP-56

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技术参数
数据手册

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MK74ZD133FLF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SSOP
包装说明：	SSOP,	针数：	56
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.84	系列：	ZD
输入调节：	STANDARD	JESD-30 代码：	R-PDSO-G56
JESD-609代码：	e3	长度：	18.415 mm
逻辑集成电路类型：	PLL BASED CLOCK DRIVER	功能数量：	1
反相输出次数：		端子数量：	56
实输出次数：	32	最高工作温度：	70 °C
最低工作温度：		输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
Same Edge Skew-Max（tskwd）：	0.2 ns	座面最大高度：	2.794 mm
最大供电电压 (Vsup)：	3.45 V	最小供电电压 (Vsup)：	3.15 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	7.5 mm
最小 fmax：	80 MHz	Base Number Matches：	1

MK74ZD133FLF 数据手册

PRELIMIN ARY IN FO RMAT IO N

MK74ZD133

PLL and 32-Output Clock Driver

Description

Features

The MK74ZD133 is a monolithic CMOS high

speed clock driver that includes an on-chip PLL

(Phase Locked Loop). Ideal for communications

and other systems that require a large number of

high-speed clocks, the unique combination of PLL

and 32 outputs can eliminate oscillators and

multiple low skew buffers. With 32 outputs

included in one device, there is also no need to

worry about chip-to-chip skew. The zero delay

modes cause the input clock rising edge to be

synchronized with all of the outputs’ rising edges.

• 56 pin SSOP or 64 pin LQFP package

• On-chip PLL generates output clocks up to

80 MHz (SSOP) or 133.33 MHz (LQFP)

• Zero delay plus multiplier function

• 32 low-skew outputs can eliminate chip-to-chip

skew concerns in systems with less than 33 clocks

• Output to output skew of 200 ps (with stagger)

• Device to device skew of 700ps

• Staggered, fixed skew helps reduce EMI

• Tri-state (Output Enable) pin

• Output blocks can be independently powered off

• 250 ps typical fixed delay between input and

output in “Multiplier” mode

The MK74ZD133 has a large selection of built-in

multipliers, making it possible to run from a clock

input as low as 10 MHz and generate high

frequency outputs up to 80 MHz in the SSOP. For

speeds up to 133.33 MHz, use the LQFP package.

• Ideal for Fast Ethernet and Gigabit Ethernet

designs

• Good for video servers

• 3.3V±5% supply voltage

Block Diagram

Optional External Connection to Output 3 (for Zero Delay Mode)

VDD

GND

Output

Output 1

Buffer

FBIN

S4:0

Output

Output 2

Buffer

Clock

Synthesis

Circuitry

Output

Output 3

Buffer

Clock input

Input

Buffer

Output

Output 32

Buffer

OE (all outputs)

MDS 74ZD133 C

Revision 010899

Printed 11/17/00

Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•www.icst.com

12 3 4 5 6 7 8

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与MK74ZD133FLF相关器件

型号	品牌	获取价格	描述	数据表
MK74ZD133FLFT	IDT	获取价格	PLL Based Clock Driver, ZD Series, 32 True Output(s), 0 Inverted Output(s), CMOS, PDSO56,
MK74ZD133FT	ICSI	获取价格	PLL and 32-Output Clock Driver
MK74ZD133Y	ICSI	获取价格	PLL and 32-Output Clock Driver
MK74ZD133YLF	IDT	获取价格	PLL Based Clock Driver, ZD Series, 32 True Output(s), 0 Inverted Output(s), CMOS, PQFP64,
MK74ZD133YLFT	IDT	获取价格	PLL Based Clock Driver, ZD Series, 32 True Output(s), 0 Inverted Output(s), CMOS, PQFP64,
MK74ZD133YT	ICSI	获取价格	PLL and 32-Output Clock Driver
MK7500FE-A52(26)	OHMITE	获取价格	Fixed Resistor, Metal Film, 0.25W, 750ohm, 250V, 1% +/-Tol, -50,50ppm/Cel,
MK7501FE	OHMITE	获取价格	Fixed Resistor, Metal Film, 0.25W, 7500ohm, 250V, 1% +/-Tol, -50,50ppm/Cel,
MK7501FE-R52	OHMITE	获取价格	0.25 W METAL FILM RESISTOR 1%
MK7502FEA26	OHMITE	获取价格	RESISTOR, METAL FILM, 0.25W, 1%, 50ppm, 75000ohm, THROUGH HOLE MOUNT, AXIAL LEADED, ROHS C

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