5秒后页面跳转
MK74CG117AFTR PDF预览

MK74CG117AFTR

更新时间: 2024-02-07 10:01:59
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管外围集成电路
页数 文件大小 规格书
8页 197K
描述
Clock Generator, CMOS, PDSO48

MK74CG117AFTR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:ObsoleteReach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.86JESD-30 代码:R-PDSO-G48
JESD-609代码:e0湿度敏感等级:1
端子数量:48最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):225电源:3.3 V
认证状态:Not Qualified子类别:Clock Generators
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

MK74CG117AFTR 数据手册

 浏览型号MK74CG117AFTR的Datasheet PDF文件第2页浏览型号MK74CG117AFTR的Datasheet PDF文件第3页浏览型号MK74CG117AFTR的Datasheet PDF文件第4页浏览型号MK74CG117AFTR的Datasheet PDF文件第5页浏览型号MK74CG117AFTR的Datasheet PDF文件第6页浏览型号MK74CG117AFTR的Datasheet PDF文件第7页 
DATASHEET  
16 OUTPUT LOW SKEW CLOCK GENERATOR  
MK74CG117A  
Description  
Features  
The MK74CG117A is a monolithic CMOS high-speed,  
low-skew clock driver that includes an on-chip PLL. Ideal for  
communications and other systems that require a large  
number of high-speed clocks, the unique combination of  
PLL and 16 low-skew outputs can eliminate oscillators and  
low-skew buffers from systems.  
48-pin SSOP (300 mil) package  
On-chip PLL generates output clocks up to 90 MHz from  
a simple crystal or clock input  
16 low-skew outputs  
Output skew less than 350 ps on rising edges  
Ability to configure as  
The device has a number of built-in multipliers, making it  
possible to run from one inexpensive, low-frequency  
crystal, and produce high-frequency clock outputs. Another  
selection allows the chip to run as a divider, dividing the  
input clock by two (or 4 using the mode select).  
– 16 clocks at full-frequency  
– 12 at full and 4 at half-frequency  
– 8 at full and 8 at half-frequency  
The device also has a buffered reference output, allowing  
multiple devices to be easily driven from one clock source.  
Tri-state mode for Output Enable function  
3.3 V 5ꢀ supply voltage  
Block Diagram  
VDD  
9
3
Clock 1  
Clock 2  
S2:0  
Clock  
Synthesis  
and Mode  
Select  
2
M1:0  
Circuitry  
Clock 16  
REF  
X1/ICLK  
Crystal or  
clock input  
Crystal  
Ocsillator  
X2  
10  
The crystal requires external capacitors for  
accurate tuning of the clock  
GND  
IDT™ / ICS™ 16 OUTPUT LOW SKEW CLOCK GENERATOR  
1
MK74CG117A REV F 082704  

与MK74CG117AFTR相关器件

型号 品牌 获取价格 描述 数据表
MK74CG117BFI IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, 0.300 INCH, SSOP-48
MK74CG117BFILF IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, 0.300 INCH, SSOP-48
MK74CG117BFILFT IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, 0.300 INCH, SSOP-48
MK74CG117BFILFTR IDT

获取价格

Clock Generator, CMOS, PDSO48
MK74CG117BFIT IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, 0.300 INCH, SSOP-48
MK74CG117BFLF IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, 0.300 INCH, SSOP-48
MK74CG117BFLFT IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, 0.300 INCH, SSOP-48
MK74CG117BFLFTR IDT

获取价格

Clock Generator, CMOS, PDSO48
MK74CG117BFT IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, 0.300 INCH, SSOP-48
MK74CG117FILFT IDT

获取价格

Clock Generator, 100MHz, CMOS, PDSO48, SSOP-48