Datasheet > MK61FN1M0VMD15

MK61FN1M0VMD15

更新时间： 2024-03-03 10:11:01

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
86页	1271K
描述
Kinetis^® K60/61-120–150 MHz, Mixed-Signal Integration and Anti-Tamper Microcon...

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MK61FN1M0VMD15 数据手册

Document Number K61P144M150SF3

Rev. 7, 02/2018

NXP Semiconductors

Data Sheet: Technical Data

K61P144M150SF3

K61 Sub-Family

Supports the following:

MK61FX512VMD15,

MK61FN1M0VMD15

Key features

• Security and integrity modules

– Hardware CRC module to support fast cyclic

redundancy checks

– Tamper detect and secure storage

– Hardware random-number generator

– Hardware encryption supporting DES, 3DES, AES,

MD5, SHA-1, and SHA-256 algorithms

– 128-bit unique identification (ID) number per chip

• Operating Characteristics

– Voltage range: 1.71 to 3.6 V

– Flash write voltage range: 1.71 to 3.6 V

– Temperature range (ambient): -40 to 105°C

• Performance

– Up to 150 MHz Arm® Cortex®-M4 core with DSP

instructions delivering 1.25 Dhrystone MIPS per

MHz

• Human-machine interface

– Low-power hardware touch sensor interface (TSI)

– General-purpose input/output

• Memories and memory interfaces

– Up to 1024 KB program flash memory on non-

FlexMemory devices

• Analog modules

– Four 16-bit SAR ADCs

– Programmable gain amplifier (PGA) (up to x64)

integrated into each ADC

– Up to 512 KB program flash memory on

FlexMemory devices

– Up to 512 KB FlexNVM on FlexMemory devices

– 16 KB FlexRAM on FlexMemory devices

– Up to 128 KB RAM

– Two 12-bit DACs

– Four analog comparators (CMP) containing a 6-bit

DAC and programmable reference input

– Voltage reference

– Serial programming interface (EzPort)

– FlexBus external bus interface

– NAND flash controller interface

• Timers

– Programmable delay block

– Two 8-channel motor control/general purpose/PWM

timers

– Two 2-channel quadrature decoder/general purpose

timers

• Clocks

– 3 to 32 MHz crystal oscillator

– 32 kHz crystal oscillator

– Multi-purpose clock generator

• System peripherals

– IEEE 1588 timers

– Multiple low-power modes to provide power

optimization based on application requirements

– Memory protection unit with multi-master

protection

– Periodic interrupt timers

– 16-bit low-power timer

– Carrier modulator transmitter

– Real-time clock

– 32-channel DMA controller, supporting up to 128

request sources

– External watchdog monitor

– Software watchdog

– Low-leakage wakeup unit

NXP reserves the right to change the production detail specifications as may be

required to permit improvements in the design of its products.

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