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MK3727D PDF预览

MK3727D

更新时间: 2024-01-01 00:38:31
品牌 Logo 应用领域
矽成 - ICSI 石英晶振压控振荡器
页数 文件大小 规格书
6页 78K
描述
LOW COST 24 - 36 MHZ 3.3 VOLT VCXO

MK3727D 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.150 INCH, ROHS COMPLIANT, SOIC-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.25
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm湿度敏感等级:1
端子数量:8最高工作温度:70 °C
最低工作温度:最大输出时钟频率:27 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:18 MHz
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Clock Generators最大供电电压:3.45 V
最小供电电压:3.15 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

MK3727D 数据手册

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MK3727  
LOW COST 24 - 36 MHZ 3.3 VOLT VCXO  
VIN is a high impedance input, it can be driven directly  
from an PWM RC integrator circuit. Frequency output  
Description  
increases with VIN voltage input. The usable range of  
VIN is 0 to 3V.  
The MK3727 series of devices include the original  
MK3727S, MK3727A, and the new MK3727C and  
MK3727D. The MK3727D and MK3727C are drop-in  
replacements for the MK3727S and MK3727A devices.  
Compared to these earlier devices the MK3727D and  
MK3727C offer a wider operating frequency range and  
improved power supply noise rejection. The MK3727D  
is recommended for new designs.  
Features  
MK3727D and MK3727C are drop-in upgrades to the  
earlier MK3727S and MK3727A devices  
MK3727D and MK3727C offer 24-36 MHz output  
frequency range (output frequency = 2x crystal  
frequency) and improved power supply noise  
rejection  
The MK3727 series combines the functions of a VCXO  
(Voltage Controlled Crystal Oscillator) and PLL (Phase  
Locked Loop) frequency doubler onto a single chip.  
Used in conjunction with an external pullable quartz  
crystal, this monolithic integrated circuit replaces more  
costly hybrid (canned) VCXO devices. The MK3727 is  
designed primarily for data and clock recovery  
Uses an inexpensive 12 to 18 MHz external crystal  
Ideal for ADSL applications using 17.664 MHz  
external pullable crystal to generate locked 35.328  
MHz clock physical layer clock  
applications within end products such as ADSL  
modems, set-top box receivers, and telecom systems.  
Ideal for set-top box applications using 13.5 MHz  
external pullable crystal to generate lock 27 MHz  
clock transport video clock  
The MK3727D is recommended for new designs. The  
MK3727D exhibits a moderate VCXO gain of  
120ppm/V typical, when used with a high quality  
external pullable quartz crystal. The MK3727C offers a  
higher VCXO gain of 150ppm/V, similar to the earlier  
MK3727A. The higher intrinsic VCXO gain of the  
MK3727C may help compensate for the reduced  
pullability of a low quality crystal used in some  
applications. However, higher VCXO gain may also  
increase clock output phase noise.  
On-chip VCXO with guaranteed pull range of ±115  
ppm minimum (MK3727D)  
VCXO input tuning voltage 0 to 3.3 V  
Packaged in 8 pin SOIC (150 mil wide)  
MK3727D is Recommended for New Designs.  
The frequency of the on-chip VCXO is adjusted by an  
external control voltage input into pin VIN. Because  
Block Diagram  
VIN  
X1  
Voltage  
12-18 MHz  
PLL  
Controlled  
24-36 MHz  
Pullable  
Frequency  
Doubler  
Crystal  
(2x Crystal Frequency)  
Crystal  
X2  
Oscillator  
MDS 3727 E  
1
Revision 052901  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 295-9800 www.icst.com  

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