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MK2049-02SITR PDF预览

MK2049-02SITR

更新时间: 2024-11-24 22:15:35
品牌 Logo 应用领域
矽成 - ICSI 晶体外围集成电路光电二极管通信时钟
页数 文件大小 规格书
12页 150K
描述
Communications Clock PLLs

MK2049-02SITR 数据手册

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MK2049-02/03  
Communications Clock PLLs  
Description  
Features  
The MK2049-02 and MK2049-03 are Phase-  
Locked Loop (PLL) based clock synthesizers that  
accept multiple input frequencies. With an 8 kHz  
clock input as a reference, the MK2049-02/03  
generate T1, E1, T3, E3, ISDN, xDSL, and other  
communications frequencies. This allows for the  
generation of clocks frequency-locked and phase-  
locked to an 8 kHz backplane clock, simplifying  
clock synchronization in communications systems.  
The MK2049-02/03 can also accept a T1, E1, T3,  
or E3 input clock and provide the same output for  
loop timing. All outputs are frequency-locked  
together and to the input.  
• Packaged in 20 pin SOIC  
• Fixed input-output phase relationship on most  
clock selections  
• Meets the TR62411, ETS300 011, and GR-1244  
specification for MTIE, Pull-in/Hold-in Range,  
Phase Transients, and Jitter Generation for  
Stratum 3, 4, and 4E  
Accept multiple inputs: 8 kHz backplane clock,  
Loop Timing frequencies, or 10-28 MHz  
• Lock to 8 kHz ±100 ppm (External mode)  
• Buffer Mode allows jitter attenuation of  
10–28 MHz input and x1/x0.5 or x2/x4 outputs  
• Exact internal ratios enable zero ppm error  
• Output clock rates include T1, E1, T3, E3, ISDN,  
xDSL, and OC3 submultiples  
These parts also have a jitter-attenuated buffer  
capability. In this mode, the MK2049-02/03 are  
ideal for filtering jitter from 27 MHz video clocks  
or other clocks with high jitter.  
ICS/MicroClock can customize these devices for  
many other different frequencies. Contact your  
ICS/MicroClock representative for more details.  
• 5 V ±5% operation. Refer to MK2049-34 for 3.3 V  
Block Diagram  
VDD  
GND  
4
3
RESET  
4
FS3:0  
PLL  
Clock  
Synthesis,  
Control, and  
Jitter  
Attenuation  
Circuitry  
Output  
Buffer  
CLK1  
CLK2  
External/  
Clock  
Output  
Buffer  
Loop Timing  
Input  
Mux  
Reference  
Crystal  
X1  
Output  
Buffer  
Crystal  
CLK3  
8 kHz  
Oscillator  
(External  
Mode only)  
X2  
CAP1  
1
CAP2  
MDS 2049-02/03 B  
Revision 040601  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel• www.icst.com  

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