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MK1412S PDF预览

MK1412S

更新时间: 2024-11-27 20:30:23
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
4页 60K
描述
Video Clock Generator, 49.152MHz, CMOS, PDSO8, SOIC-8

MK1412S 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP8,.25
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.9 mm端子数量:8
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:49.152 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
主时钟/晶体标称频率:14.318 MHz认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Clock Generators
最大供电电压:5.5 V最小供电电压:3 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, VIDEOBase Number Matches:1

MK1412S 数据手册

 浏览型号MK1412S的Datasheet PDF文件第2页浏览型号MK1412S的Datasheet PDF文件第3页浏览型号MK1412S的Datasheet PDF文件第4页 
MK1412  
MPEG Audio Clock Synthesizer  
Description  
Features  
• Packaged in 8 pin SOIC  
The MK1412 is the ideal way to generate clocks  
for MPEG audio devices in computers. The device  
uses ICS/MicroClock’s proprietary mixture of  
analog and digital Phase-Locked Loop (PLL)  
technology to synthesize one of eight frequencies  
(four on each output) from the 14.31818 MHz  
reference. In an 8 pin SOIC, the MK1412 can save  
component count, board space, and cost over  
crystals and oscillators, and increase reliability by  
eliminating three expensive mechanical devices  
from the board.  
• Input crystal or clock frequency of 14.31818 MHz  
• Provides master MPEG clocks for 32 kHz,  
44.1 kHz, 48 kHz and 96 kHz sampling rates  
• Output clock frequencies of 256x and 512x of the  
audio sampling rates compatible with most DACs  
• Low jitter  
We offer many other clocks for computers and  
computer peripherals. Consult us when you need  
to remove crystals and oscillators from your board.  
• Full CMOS output swing with 25mA drive  
capability at TTL levels  
• 3.3V or 5V±10% supply voltage  
Due to a long lead time in the original wafer fab  
that makes the MK1412S, we have retooled the  
die and now call the part the MK1412A. All  
functional parameters are the same as or better  
than the original part.  
• Advanced, low power CMOS process  
• The A version is the newest version in a more  
advanced manufacturing process  
Block Diagram  
VDD GND  
Output  
CLK  
2
Buffer  
S1, S0  
PLL  
Clock Synthesis  
and Control  
Circuitry  
14.31818 MHz  
crystal or clock  
X1  
÷ 2  
Output  
Buffer  
CLK/2  
Crystal  
Oscillator  
X2  
MDS 1412 B  
1
Revision 060200  
Printed 11/15/00  
Integrated Circuit Systems, Inc.• 525 Race Street• San Jose • CA • 95126• (408)295-9800tel •www.icst.com  

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