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MIC4807AJBQ PDF预览

MIC4807AJBQ

更新时间: 2024-11-21 13:11:31
品牌 Logo 应用领域
麦瑞 - MICREL 驱动器
页数 文件大小 规格书
8页 105K
描述
Latch Based Peripheral Driver, 0.25A, CDIP18, CERAMIC, DIP-18

MIC4807AJBQ 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:18
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.75
Is Samacsys:N内置保护:OVER CURRENT; THERMAL
接口集成电路类型:LATCH BASED PERIPHERAL DRIVERJESD-30 代码:R-GDIP-T18
长度:22.606 mm功能数量:8
端子数量:18最高工作温度:125 °C
最低工作温度:-55 °C输出电流流向:SINK
标称输出峰值电流:0.25 A封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
筛选级别:MIL-STD-883座面最大高度:5.08 mm
最大供电电压:16 V最小供电电压:4.5 V
标称供电电压:15 V表面贴装:NO
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
断开时间:2.5 µs接通时间:0.0025 µs
宽度:7.62 mmBase Number Matches:1

MIC4807AJBQ 数据手册

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MIC4807  
80V 8-Channel Addressable Low-Side Driver  
General Description  
Features  
4.5V to 16V Operation  
Eight 80V 100mA Outputs  
Off-state Leakage less than 10µA at 25°C  
Short-Circuit Proof  
Thermal Shutdown with Hysteresis  
DMOS Output Devices (RON 7at 25°C)  
The MIC4807 is an 80V, 8-channel, addressable low side  
driver with latches and TTL/CMOS compatible logic inputs.  
Each logic input is composed of a comparator with a 1.4V  
bandgap-derived reference serving as the trip point. The  
addresses (AIN, BIN, and CIN) and Data-in logic inputs have an  
internal50µApull-upcurrentsource, whiletheOutputEnable  
(OE), Chip Select (CS), and Clear logic inputs have an  
internal75µApull-downsink. IfthelogiclinestotheMIC4807  
are severed, these currents guarantee that the outputs will  
turn OFF.  
Applications  
Lamp Drivers  
Solenoid Drivers  
Display Drivers  
-Electroluminescent  
-Vacuum Fluorescent  
-Plasma  
Relay Drivers  
Print Head Drivers  
Heater Drivers  
Power Semiconductor Drivers  
Security Systems  
Environmental Controls  
Process Controllers  
Individual latches in the MIC4807 are selected by a binary  
address presented at inputs AIN, BIN, and CIN. Data-in is  
directed to the addressed latch while CS is held low, allowing  
an individual output to be pulse-width modulated. When CS  
issethighagain, thelastData-inisstoredinthelatch. IfData-  
in="1",theaddressedoutputisturnedon,andifData-in="0",  
the addressed output is turned off.  
Information presented to Data-in and the address inputs is  
transferred to the latches while CS is pulled low. For  
application, where several outputs must be  
(Continued)  
Pin Diagram  
Ordering Information  
1
2
3
4
18  
17  
16  
15  
14  
13  
12  
11  
10  
HVOUT1  
HVOUT0  
Data-in  
AIN  
HVOUT2  
HVOUT3  
VDD  
Part  
Number  
Operating  
Temperature-Range  
Package  
7
MIC4807BN  
-40°C to 85°C  
18-Pin Plastic DIP  
MIC4807  
OE  
Ground  
CS  
5
6
7
8
9
BIN  
CIN  
Clear  
VDD  
HVOUT4  
HVOUT5  
HVOUT7  
HVOUT6  
Block Diagram  
Thermal  
Shutdown  
Current  
Limit  
17 HVOUT0  
V
DD 12  
HVOUT1  
HVOUT2  
HVOUT3  
HVOUT4  
HVOUT5  
18  
1
AIN 15  
BIN 14  
CIN 13  
Driver  
2
8
9
Addressing  
{
Address  
Decoder  
Latches  
10 HVOUT6  
11 HVOUT7  
16  
Driver  
Data-in  
Ground 5  
6
7
4
CS  
Clear  
OE  
October 1998  
7-3  

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