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MGA-31489 PDF预览

MGA-31489

更新时间: 2024-01-21 05:12:49
品牌 Logo 应用领域
安华高科 - AVAGO 放大器驱动
页数 文件大小 规格书
13页 509K
描述
0.1W High Gain Driver Amplifier

MGA-31489 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:TO-243Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:8.56Is Samacsys:N
其他特性:LOW NOISE特性阻抗:50 Ω
构造:COMPONENT增益:18.2 dB
最大输入功率 (CW):20 dBmJESD-609代码:e3
安装特点:SURFACE MOUNT功能数量:1
端子数量:3最大工作频率:3000 MHz
最小工作频率:1500 MHz封装主体材料:PLASTIC/EPOXY
封装等效代码:TO-243电源:5 V
射频/微波设备类型:WIDE BAND MEDIUM POWER子类别:RF/Microwave Amplifiers
最大压摆率:84 mA表面贴装:YES
技术:GAAS端子面层:Tin (Sn)
Base Number Matches:1

MGA-31489 数据手册

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MGA-31489  
0.1W High Gain Driver Amplifier  
1.5GHz ~ 3GHz  
Data Sheet  
Description  
Features  
Avago Technologies MGA-31489 is a high performance  
Driver Amplifier MMIC, housed in a standard SOT-89 plastic  
package. The device features flat high gain with excellent  
input and output return loss, as well as superior linearity  
•ꢀ ROHS compliant  
•ꢀ Halogen free  
[1]  
•ꢀ High IP3 at low DC bias power  
performance. The device can be easily matched to obtain •ꢀ High gain, with good gain flatness  
desired performance.  
•ꢀ Low noise figure  
MGA-314389 is especially ideal for 50 wireless infrastruc-  
ture application within the 1.5 GHz to 3 GHz frequency  
range applications. With high IP3 and low noise figure and  
wideband operation, the MGA-31489 may be utilized as  
a driver amplifier in the transmit chain and as a second  
stage LNA in the receiver chain.  
•ꢀ Advanced enhancement mode PHEMT Technology  
•ꢀ Excellent uniformity in product specification  
•ꢀ SOT-89 standard package  
Specifications  
At 1.9 GHz, Vd = 5 V, Id = 69 mA (typ) @ 25° C  
•ꢀ OIP3 = 37.3 dBm  
This device uses Avago Technologies proprietary 0.25 mm  
GaAs Enhancement mode PHEMT process.  
•ꢀ Noise Figure = 1.9 dB  
Pin connections and Package Marking  
•ꢀ Gain = 19.5 dB, Gain Flatness ( 50 MHz) = 0.11 dB  
•ꢀ P1dB = 21.9 dBm  
•ꢀ IRL = 17.2 dB, ORL = 10.1 dB  
Note:  
1. The MGA-31489 has a superior LFOM of 11.9 dB. Linearity Figure of  
Merit (LFOM) is essentially OIP3 divided by DC bias power.  
14X  
#1  
RFin  
#2  
#3  
RFout  
#3  
RFout  
#2  
#1  
RFin  
Simplified Schematic  
GND  
GND  
Vdd  
Top View  
Bottom View  
C
Note:  
Top View: Package marking provides orientation and identification  
“14” = Device Code  
“X” = Date Code character indentifies month of manufacturing  
C
C
Attention: Observe precautions for  
handling electrostatic sensitive devices.  
ESD Machine Model = 120 V  
L
RFout  
RFin  
ESD Human Body Model = 1400 V  
Refer to Avago Application Note A004R:  
Electrostatic Discharge, Damage and Control.  
C
C
L
Figure 1. Simplified Schematic diagram  

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