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MGA-13216 PDF预览

MGA-13216

更新时间: 2024-11-07 12:32:39
品牌 Logo 应用领域
安华高科 - AVAGO 放大器
页数 文件大小 规格书
11页 294K
描述
High Gain, High Linearity, Very Low Noise Amplifier

MGA-13216 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ObsoleteReach Compliance Code:compliant
风险等级:5.83特性阻抗:50 Ω
构造:COMPONENT增益:34.3 dB
最大输入功率 (CW):20 dBm最大工作频率:2500 MHz
最小工作频率:1500 MHz射频/微波设备类型:WIDE BAND MEDIUM POWER
Base Number Matches:1

MGA-13216 数据手册

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MGA-13216  
High Gain, High Linearity, Very Low Noise Amplifier  
Data Sheet  
Description  
Features  
Avago Technologies’ MGA-13216 is a two stage, easy-to- ꢁꢂ Optimum frequency of operation 1.5 GHz – 2.5 GHz  
use GaAs MMIC Low Noise Amplifier (LNA). The LNA has  
low noise with good input return loss and high linearity  
achieved through the use of Avago Technologies’ propri-  
ꢁꢂ Very low noise figure  
ꢁꢂ High gain  
ꢁꢂ High linearity performance  
etary 0.25 m GaAs Enhancement-mode pHEMT process.  
Minimum matching needed for input, output and the ꢁꢂ Excellent isolation  
inter-stage between the two LNA.  
[1]  
ꢁꢂ GaAs E-pHEMT Technology  
3
It is designed for optimum use between 1.5 GHz to 2.5  
GHz. For optimum performance at lower frequency from  
400 MHz to 1.5 GHz, the MGA-13116 is recommended.  
Both MGA-13216 & MGA-13116 share the same package  
and pinout configuration.  
ꢁꢂ Low cost small package size: 4.0 x 4.0 x 0.85 mm  
Specifications  
1.95 GHz; Q1: 5 V, 53 mA (typ) Q2: 5 V, 122 mA (typ)  
ꢁꢂ 0.61 dB Noise Figure  
Pin Configuration and Package Marking  
ꢁꢂ 35.8 dB Gain  
ꢁꢂ 46 dB RFoutQ1 to RFinQ2 Isolation  
ꢁꢂ 40.5 dBm Output IP3  
3
4.0 x 4.0 x 0.85 mm 16-lead QFN  
ꢁꢂ 23.6 dBm Output Power at 1dB gain compression  
Pin 2 Vbias  
Pin 3 RFinQ1  
Pin 10 RFoutQ2  
Pin 11 RFoutQ2  
Pin 13 RFinQ2  
Pin 16 RFoutQ1  
12  
11  
10  
9
1
2
3
4
AVAGO  
13216  
YYWW  
XXXX  
Applications  
GND  
ꢁꢂ Low noise amplifier for cellular infrastructure including  
GSM, CDMA, and W-CDMA.  
All other pins NC  
Not Connected  
ꢁꢂ Other very low noise applications.  
TOP VIEW  
BOTTOM VIEW  
Simplified Schematic  
Note:  
Vdd2  
Vdd1  
C10  
Package marking provides orientation and identification  
“13216” = Device Part Number  
“YYWW” = Work Week and Year of Manufacture  
“XXXX” = Lot Number  
C9  
C8  
R4  
R2  
C7  
L3  
C5  
R3  
L1  
C4  
C3  
C6 R1  
Attention: Observe precautions for  
handling electrostatic sensitive devices.  
ESD Machine Model = 90 V  
ESD Human Body Model = 650 V  
Refer to Avago Application Note A004R:  
Electrostatic Discharge, Damage and Control.  
16 15 14 13  
1
12  
11  
L2  
2
Q1bias  
RFIN  
RFOUT  
C1  
C2  
Q1  
Q2  
3
4
10  
9
5
6
7
8
Notes: Enhancement mode technology employs positive gate bias,  
thereby eliminating the need of negative gate voltage associated with  
conventional depletion mode devices.  

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