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MFRC50001T0FE PDF预览

MFRC50001T0FE

更新时间: 2024-11-17 01:15:43
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
110页 599K
描述
The "Original" MIFARE reader solution

MFRC50001T0FE 数据手册

 浏览型号MFRC50001T0FE的Datasheet PDF文件第2页浏览型号MFRC50001T0FE的Datasheet PDF文件第3页浏览型号MFRC50001T0FE的Datasheet PDF文件第4页浏览型号MFRC50001T0FE的Datasheet PDF文件第5页浏览型号MFRC50001T0FE的Datasheet PDF文件第6页浏览型号MFRC50001T0FE的Datasheet PDF文件第7页 
MFRC500  
The "Original" MIFARE reader solution  
Rev. 3.4 — 11 February 2014  
048034  
Product data sheet  
COMPANY PUBLIC  
1. Introduction  
This data sheet describes the functionality of the MFRC500 Integrated Circuit (IC). It  
includes the functional and electrical specifications and from a system and hardware  
viewpoint gives detailed information on how to design-in the device.  
Remark: The MFRC500 supports all variants of the MIFARE Classic, MIFARE 1K and  
MIFARE 4K RF identification protocols. To aid readability throughout this data sheet, the  
MIFARE Classic, MIFARE 1K and MIFARE 4K products and protocols have the generic  
name MIFARE.  
2. General description  
The MFRC500 is a highly integrated reader IC for contactless communication at  
13.56 MHz. The MFRC500 reader IC provides:  
outstanding modulation and demodulation for passive contactless communication  
a wide range of methods and protocols  
pin compatibility with the CLRC632, MFRC530, MFRC531 and SLRC400  
All protocol layers of the ISO/IEC 14443 A are supported  
The receiver module provides a robust and efficient demodulation/decoding circuitry  
implementation for compatible transponder signals (see Section 9.10 on page 30). The  
digital module, manages the complete ISO/IEC 14443 A standard framing and error  
detection (parity and CRC). In addition, it supports the fast Crypto1 security algorithm for  
authenticating the MIFARE products (see Section 9.12 on page 35).  
The internal transmitter module (Section 9.9 on page 27) can directly drive an antenna  
designed for a proximity operating distance up to 100 mm without any additional active  
circuitry.  
A parallel interface can be directly connected to any 8-bit microprocessor to ensure  
reader/terminal design flexibility.  

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