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MEB90500 PDF预览

MEB90500

更新时间: 2024-09-07 22:30:15
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页数 文件大小 规格书
5页 102K
描述
Customer Evaluation Kit Advance Information

MEB90500 数据手册

 浏览型号MEB90500的Datasheet PDF文件第2页浏览型号MEB90500的Datasheet PDF文件第3页浏览型号MEB90500的Datasheet PDF文件第4页浏览型号MEB90500的Datasheet PDF文件第5页 
MEB90500 - E1  
Customer Evaluation Kit  
Advance Information  
ISSUE 1  
March1998  
Features  
Ordering Information  
Allows Mitel customers to evaluate the MT90500AL  
device  
Demonstrates the advantages of Mitel AAL1  
solution  
Eases bench-top prototyping to reduce  
development risk  
Provides a highly functional graphical user  
interface (GUI) in Windows NT  
Provides built-in logic for 155 Mbps, SONET STS-  
3C optical interface  
MEB90500 - E1  
path  
This kit includes: handset connector for voice  
over ATM demo, 2 cards with 155 Mbps access  
rate and optical cable for interconnecting 2  
cards  
Includes Mitel MT9041 PLL to implement clock  
recovery  
PLL connectivity for clock recovery  
Works with ISA-compatible cards for PC platforms  
Windows NT operating system  
Built-in connectors include: MT90500 UTOPIA L1  
signals, MT90500 external SSRAM interface, PLL  
signals, MT90500 CPU bus header, MT90500  
JTAG lines, 40-pin MVIP header for external TDM  
bus connection  
Introduction  
This document describes a kit containing printed  
circuit boards and sample software to be provided to  
Mitel MT90500 customers.  
The package containing the card, example software,  
windows-based GUI and installation and description  
documentation is referred to as the MT90500  
Customer Evaluation Kit (MCEK), from now on in  
this document.  
Wire-wrap area  
Includes Mitel MT90820 digital cross-point for TDM  
pattern generation  
Includes Mitel MT9160 codec to establish voice  
JTAG signals  
Header  
PLL Signals  
Header  
Sec UTOPIA Bus  
Header  
RX UTOPIA Bus  
Header  
TX UTOPIA Bus  
Header  
PHY Clock  
Source Headers  
SSRAM Bus Header  
MVIP 40 Pin Connector  
JP1  
Markings  
Use Arial 10pts.  
U10  
JP6  
LDX  
MT90820  
100 PQFP  
U13  
PLL  
MT9041  
JP3  
U14  
20.0 MHZ  
14 DIP  
U26  
19.44 MHZ  
14 DIP  
28PLCC  
JP7  
JP4  
U25  
TX Plane  
U23  
U8  
9 PIN  
ODL  
SSRAM  
64X18  
RX Plane  
U28  
MCA1  
240PQFP  
D1  
U7  
U22  
SSRAM  
64X18  
U
15  
J1  
JP23  
JP11  
JP13  
Tele.  
RJ11  
50  
MHZ  
8 DIP  
JP12  
U4  
Altera  
44PLCC  
U5  
Altera  
44PLCC  
U3  
24QSOP  
5V ISA Connector  
J2  
Wire-Wrap  
Area  
ISA Bus Mapping  
Header  
Local TDM Bus  
Header  
Message Channel  
Header  
Int select Header  
CPU Bus Header  
Figure 1 - Evaluation Board Components  
1

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