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MD1821 PDF预览

MD1821

更新时间: 2024-11-21 14:56:03
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
16页 658K
描述
MD1821 is a high speed, four channel MOSFET driver designed to drive high voltage P- and N-channel

MD1821 数据手册

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MD1821  
High-Speed 4-Channel MOSFET Driver with Inverting Outputs  
Features  
General Description  
• Inverting MOSFET Driver  
• 6 ns Rise and Fall Time  
The MD1821 is a high-speed, 4-channel MOSFET  
driver designed to drive high-voltage P-channel and  
N-channel MOSFETs for medical ultrasound  
applications and other applications requiring a high  
output current for a capacitive load. The high-speed  
input stage of the MD1821 can operate from a 1.8V  
to 5V logic interface with an optimum operating input  
signal range of 1.8V to 3.3V. An adaptive threshold  
circuit is used to set the level translator switch  
threshold to the average of the input logic 0 and  
logic 1 levels. The input logic levels may be ground  
referenced even though the driver is putting out bipolar  
signals. The level translator uses a proprietary circuit,  
which provides DC coupling together with high-speed  
operation.  
• 2A Peak Output Source and Sink Currents  
• 1.8V to 5V Input CMOS Compatible  
• 5V to 10V Total Supply Voltage  
• Smart Logic Threshold  
• Low-jitter Design  
• Four Matched Channels  
• Drives Two P-channel and Two N-channel  
MOSFETs  
• Outputs can Swing below Ground  
• Low-inductance Quad Flat No-lead Package  
• High-performance, Thermally Enhanced Package  
The output stage of the MD1821 has separate power  
connections, enabling the output signal L and H levels  
to be chosen independently from the supply voltages  
used for the majority of the circuit. As an example, the  
input logic levels may be 0V and 1.8V, the control logic  
may be powered by +5 and –5V and the output  
L and H levels may be varied anywhere over the range  
of –5 to +5V. The output stage is capable of peak  
currents of up to ±2A, depending on the supply  
voltages used and load capacitance present. The PE  
pin serves a dual purpose. First, its logic H level is used  
to compute the threshold voltage level for the channel  
input level translators. Second, when PE is low, the  
outputs are disabled, with the A and C outputs high and  
the B and D outputs low. This assists in properly  
precharging the AC coupling capacitors that may be  
used in series in the gate drive circuit of an external  
PMOS and NMOS transistor pair.  
Applications  
• Medical Ultrasound Imaging  
• Piezoelectric Transducer Drivers  
• Non-destructive Testing (NDT)  
• PIN Diode Driver  
• CCD Clock Driver/buffer  
• High-speed Level Translator  
Package Type  
16-lead QFN  
(Top view)  
1
See Table 2-1 for pin information.  
2017 Microchip Technology Inc.  
DS20005768A-page 1  

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