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MCP47CMB21-EMF PDF预览

MCP47CMB21-EMF

更新时间: 2024-11-28 02:43:51
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美国微芯 - MICROCHIP /
页数 文件大小 规格书
124页 9049K
描述
8/10/12-Bit Digital-to-Analog Converters, 1 LSb INL Single/Dual Voltage Outputs with I2C Interface

MCP47CMB21-EMF 数据手册

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MCP47CXBXX  
8/10/12-Bit Digital-to-Analog Converters, 1 LSb INL  
Single/Dual Voltage Outputs with I2C Interface  
Features  
Package Types  
MCP47CXBX1 (Single)  
MSOP-10, DFN-10 (3x3)  
• Memory Options:  
- Volatile Memory: MCP47CVBXX  
- Nonvolatile Memory: MCP47CMBXX  
• Operating Voltage Range:  
V
DD  
1
2
3
10  
SDA  
A0  
REF  
OUT  
9 SCL  
- 2.7V to 5.5V – Full specifications  
- 1.8V to 2.7V – Reduced device specifications  
• Output Voltage Resolutions:  
V
A1  
8
V
V
7
4
SS  
-
8-bit: MCP47CXB0X (256 steps)  
NC 5  
6 LAT/HVC  
- 10-bit: MCP47CXB1X (1024 steps)  
- 12-bit: MCP47CXB2X (4096 steps)  
• Nonvolatile Memory (MTP) Size: 32 Locations  
• 1 LSb Integral Nonlinearity (INL) Specification  
• DAC Voltage Reference Source Options:  
- Device VDD  
QFN-16 (3x3)  
A0  
1
2
3
4
12  
SCL  
V
V
11 A1  
10 V  
REF  
(1)  
- External VREF pin (buffered or unbuffered)  
- Internal band gap (1.214V typical)  
• Output Gain Options:  
17 EP  
OUT  
SS  
NC  
9
LAT/HVC  
- 1x (Unity)  
- 2x (available when not using internal VDD as  
voltage source)  
MCP47CXBX2 (Dual)  
MSOP-10, DFN-10 (3x3)  
• Power-on/Brown-out Reset (POR/BOR)  
Protection  
V
DD  
1
2
3
10  
SDA  
• Power-Down Modes:  
A0  
- Disconnects output buffer (high-impedance)  
9 SCL  
- Selection of VOUT pull-down resistors  
V
REF  
A1  
8
(100 kor 1 k)  
V
OUT0  
OUT1  
V
7
4
5
SS  
• I2C Interface:  
(2)  
V
6 LAT/HVC  
- Slave address options: register-defined  
address with two physical address select pins  
(package dependent)  
QFN-16 (3x3)  
- Standard (100 kbps), Fast (400 kbps) and  
High-Speed (up to 3.4 Mbps) modes  
• Package Types:  
A0  
1
2
3
4
12  
SCL  
- Dual: 16-lead 3 x 3 QFN, 10-lead MSOP,  
10-lead 3 x 3 DFN  
V
V
11 A1  
10 V  
REF0  
(1)  
17 EP  
OUT0  
SS  
- Single: 16-lead 3 x 3 QFN, 10-lead MSOP,  
10-lead 3 x 3 DFN  
V
9
LAT0/HVC  
REF1  
• Extended Temperature Range: -40°C to +125°C  
Note 1: Exposed pad (substrate paddle).  
2: This pin’s signal can be connected to DAC0  
and/or DAC1.  
2018-2019 Microchip Technology Inc.  
DS20006089B-page 1  

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