Datasheet > MCM69R536ZP5

MCM69R536ZP5

更新时间： 2024-09-26 06:41:27

品牌	Logo	应用领域
恩智浦 - NXP		静态存储器
页数	文件大小	规格书
20页	378K
描述
32KX36 LATE-WRITE SRAM, 2.5ns, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119

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MCM69R536ZP5 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

MOTOROLA

Order this document

by MCM69R536/D

MCM69R536

MCM69R618

Advance Information

1M Late Write HSTL

The MCM69R536/618 is a 1 megabit synchronous late write fast static RAM

designed to provide high performance in secondary cache, ATM switch,

Telecom, and other high speed memory applications. The MCM69R618

organized as 64K words by 18 bits, and the MCM69R536 organized as 32K

words by 36 bits wide are fabricated in Motorola’s high performance silicon gate

BiCMOS technology.

The differential CK clock inputs control the timing of read/write operations of

the RAM. At the rising edge of the CK clock all addresses, write enables, and

synchronous selects are registered. An internal buffer and special logic enable

the memory to accept write data on the rising edge of the CK clock a cycle after

address and control signals. Read data is driven on the rising edge of the CK

clock also.

ZP PACKAGE

PBGA

CASE 999–01

TheRAMusesHSTLinputsandoutputs. Theadjustableinputtrip–point(V

)

ref

and output voltage (V

) gives the system designer greater flexibility in

DDQ

optimizing system performance.

The synchronous write and byte enables allow writing to individual bytes or the

entire word.

The impedance of the output buffers is programmable allowing the outputs to

match the impedance of the circuit traces which reduces signal reflections.

•

Byte Write Control

Single 3.3 V + 10%, – 5% Operation

HSTL – I/O (JEDEC Standard JESD8–6 Class 1 Compatible)

HSTL – User Selectable Input Trip–Point

HSTL – Compatible Programmable Impedance Output Drivers

Asynchronous Output Enable

Boundary Scan (JTAG) IEEE 1149.1 Compatible

Differential Clock Inputs

Optional x18 or x36 organization

MCM69R536/618–5 = 5 ns

MCM69R536/618–6 = 6 ns

MCM69R536/618–7 = 7 ns

MCM69R536/618–8 = 8 ns

•

119 Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Plastic Ball Grid Array

(PBGA) Package

This document contains information on a new product. Specifications and information herein are subject to change without notice.

REV 1

8/15/97

Motorola, Inc. 1997

MOTOROLA FAST SRAM

MCM69R536•MCM69R618

For More Information On This Product,

Go to: www.freescale.com

12 3 4 5 6 7...20

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与MCM69R536ZP5相关器件

型号	品牌	获取价格	描述	数据表
MCM69R536ZP5R	MOTOROLA	获取价格	Late-Write SRAM, 32KX36, 2.5ns, BICMOS, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-1
MCM69R536ZP6R	MOTOROLA	获取价格	32KX36 LATE-WRITE SRAM, 3ns, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R536ZP7R	MOTOROLA	获取价格	Late-Write SRAM, 32KX36, 3.5ns, BICMOS, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-1
MCM69R537ZP5	MOTOROLA	获取价格	32KX36 CACHE SRAM, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R537ZP5R	MOTOROLA	获取价格	32KX36 CACHE SRAM, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R537ZP6	MOTOROLA	获取价格	32KX36 CACHE SRAM, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R537ZP6R	MOTOROLA	获取价格	32KX36 CACHE SRAM, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R537ZP7	MOTOROLA	获取价格	Cache SRAM, 32KX36, 3.5ns, BICMOS, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R537ZP7R	MOTOROLA	获取价格	32KX36 CACHE SRAM, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R537ZP8	MOTOROLA	获取价格	32KX36 CACHE SRAM, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119

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