Datasheet > MCM63Z837ZP7.0R

MCM63Z837ZP7.0R

更新时间： 2024-11-26 05:51:15

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		静态存储器
页数	文件大小	规格书
32页	358K
描述
256KX36 ZBT SRAM, 7ns, PBGA119, PLASTIC, BGA-119

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MCM63Z837ZP7.0R 数据手册

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SEMICONDUCTOR TECHNICAL DATA

MCM63Z837

MCM63Z919

Advance Information

256K x 36 and 512K x 18 Bit

Flow–Through ZBT RAM

Synchronous Fast Static RAM

The ZBT RAM is an 8M–bit synchronous fast static RAM designed to provide

Zero Bus Turnaround . The ZBT RAM allows 100% use of bus cycles during

back–to–back read/write and write/read cycles. The MCM63Z837 (organized as

256K words by 36 bits) and the MCM63Z919 (organized as 512K words by 18

bits) are fabricated in Motorola’s high performance silicon gate CMOS

technology. This device integrates input registers, a 2–bit address counter, and

high speed SRAM onto a single monolithic circuit for reduced parts count in

communication applications. Synchronous design allows precise cycle control

with the use of an external clock (CK). CMOS circuitry reduces the overall power

consumption of the integrated functions for greater reliability.

TQ PACKAGE

TQFP

CASE 983A–01

ZP PACKAGE

PBGA

CASE 999–02

Addresses (SA), data inputs (DQ), and all control signals except output enable

(G), sleep mode (ZZ), and linear burst order (LBO) are clock (CK) controlled

through positive–edge–triggered noninverting registers.

Write cycles are internally self–timed and are initiated by the rising edge of the

clock (CK) input. This feature eliminates complex off–chip write pulse generation

and provides increased timing flexibility for incoming signals.

For read cycles, a flow–through SRAM allows output data to simply flow freely

from the memory array.

•

3.3 V LVTTL and LVCMOS Compatible

MCM63Z837/918–7.0 = 7 ns Access/8.5 ns Cycle (117 MHz)

MCM63Z837/918–7.5 = 7.5 ns Access/10 ns Cycle (100 MHz)

MCM63Z837/918–8 = 8 ns Access/10.5 ns Cycle (95 MHz)

MCM63Z837/918–8.5 = 8.5 ns Access/11 ns Cycle (90 MHz)

MCM63Z837/918–10 = 10 ns Access/15 ns Cycle (66 MHz)

Selectable Burst Sequencing Order (Linear/Interleaved)

Internally Self–Timed Write Cycle

Sleep Mode (ZZ)

Single–Cycle Deselect

Byte Write Control

ADV Controlled Burst

•

IEEE 1149–1 Sample Only JTAG

100–Pin TQFP and 119–Bump PBGA Packages

ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc., and the architecture is supported by

Micron Technology, Inc. and Motorola, Inc.

This document contains information on a new product. Specifications and information herein are subject to change without notice.

REV 1

6/3/99

Motorola, Inc. 1999

MOTOROLA FAST SRAM

MCM63Z837•MCM63Z919

12 3 4 5 6 7...32

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与MCM63Z837ZP7.0R相关器件

型号	品牌	获取价格	描述	数据表
MCM63Z837ZP7.5	MOTOROLA	获取价格	256KX36 ZBT SRAM, 7.5ns, PBGA119, PLASTIC, BGA-119
MCM63Z837ZP7.5R	MOTOROLA	获取价格	256KX36 ZBT SRAM, 7.5ns, PBGA119, PLASTIC, BGA-119
MCM63Z837ZP8	MOTOROLA	获取价格	256KX36 ZBT SRAM, 8ns, PBGA119, PLASTIC, BGA-119
MCM63Z837ZP8.5	MOTOROLA	获取价格	ZBT SRAM, 256KX36, 8.5ns, CMOS, PBGA119, PLASTIC, BGA-119
MCM63Z837ZP8.5R	MOTOROLA	获取价格	ZBT SRAM, 256KX36, 8.5ns, CMOS, PBGA119, PLASTIC, BGA-119
MCM63Z837ZP8R	MOTOROLA	获取价格	ZBT SRAM, 256KX36, 8ns, CMOS, PBGA119, PLASTIC, BGA-119
MCM63Z916	MOTOROLA	获取价格	256K x 36 and 512K x 18 Bit ZBT Fast Static RAM
MCM63Z916TQ10	MOTOROLA	获取价格	256K x 36 and 512K x 18 Bit ZBT Fast Static RAM
MCM63Z916TQ10R	MOTOROLA	获取价格	256K x 36 and 512K x 18 Bit ZBT Fast Static RAM
MCM63Z916TQ10R	NXP	获取价格	512KX18 ZBT SRAM, 10ns, PQFP100, TQFP-100

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