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MC74VHCT595ADTR2

更新时间： 2024-11-27 10:30:27
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 光电二极管
页数 文件大小 规格书
12页 268K
描述
Serial In Parallel Out, AHC/VHC Series, 8-Bit, Right Direction, True Output, CMOS, PDSO16, TSSOP-16

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MC74VHCT595ADTR2 数据手册

 浏览型号MC74VHCT595ADTR2的Datasheet PDF文件第2页浏览型号MC74VHCT595ADTR2的Datasheet PDF文件第3页浏览型号MC74VHCT595ADTR2的Datasheet PDF文件第4页浏览型号MC74VHCT595ADTR2的Datasheet PDF文件第5页浏览型号MC74VHCT595ADTR2的Datasheet PDF文件第6页浏览型号MC74VHCT595ADTR2的Datasheet PDF文件第7页 
http://onsemi.com  
MARKING DIAGRAMS  
The MC74VHCT595A is an advanced high speed 8–bit shift register  
with an output storage register fabricated with silicon gate CMOS  
technology. It achieves high speed operation similar to equivalent Bipolar  
Schottky TTL while maintaining CMOS low power dissipation. The  
MC74VHCT595A contains an 8–bit static shift register which feeds an  
8–bit storage register.  
The device input is compatible with TTL–type input thresholds and the  
output has a full 5 V CMOS level output swing. The input protection  
circuitry on this device allows overvoltage tolerance on the input, allowing  
the device to be used as a logic–level translator from 3.0 V CMOS to 5.0 V  
CMOS logic, or from 1.8 V CMOS logic to 3.0 V CMOS logic, while  
operating at the high–voltage power supply.  
Shift operation is accomplished on the positive going transition of the  
Shift Clock input (SCK). The output register is loaded with the contents of  
the shift register on the positive going transition of the Register Clock input  
(RCK). Since the RCK and SCK signals are independent, parallel outputs  
can be held stable during the shift operation. And, since the parallel outputs  
are 3–state, the VHC595 can be directly connected to an 8–bit bus. This  
register can be used in serial–to–parallel conversion, data receivers, etc.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The input  
structure provides protection when voltages up to 7 V are applied,  
regardless of the supply voltage. This allows the device to be used to  
interface 5 V circuits to 3 V circuits. The output structures also provide  
16  
9
VHCT595A  
AWLYYWW  
SOIC–16  
D SUFFIX  
CASE 751B  
1
8
16  
9
VHCT  
595A  
TSSOP–16  
DT SUFFIX  
CASE 948F  
AWLYWW  
1
8
16  
9
VHCT595A  
ALYW  
SOIC EIAJ–16  
M SUFFIX  
CASE 966  
1
8
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
protection when V = 0 V. These input and output structures help prevent  
CC  
device destruction caused by supply voltage—input/output voltage  
mismatch, battery backup, hot insertion, etc.  
A
= Assembly Location  
WL = Wafer Lot  
= Year  
WW = Work Week  
A
L
Y
= Assembly Location  
= Wafer Lot  
= Year  
Y
• High Speed: f  
= 185MHz (Typ) at V  
= 5V  
= 4µA (Max) at T = 25°C  
max  
• Low Power Dissipation: I  
CC  
W = Work Week  
CC  
A
• TTL–Compatible Inputs: V = 0.8 V; V = 2.0 V  
IL IH  
• Power Down Protection Provided on Inputs  
• Balanced Propagation Delays  
ORDERING INFORMATION  
• Designed for 3 V to 5.5 V Operating Range  
Device  
Package  
Shipping  
• Low Noise: V  
= 1.0 V (Max)  
MC74VHCT595AD  
SOIC–16  
48 Units/Rail  
OLP  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300mA  
MC74VHCT595ADR2 SOIC–16 2500 Units/Reel  
MC74VHCT595ADT TSSOP–16 96 Units/Rail  
• ESD Performance: HBM > 2000V; Machine Model > 200V  
MC74VHCT595ADTEL TSSOP–16 2000 Units/Reel  
MC74VHCT595ADTR2 TSSOP–16 2500 Units/Reel  
SOIC  
MC74VHCT595AM  
50 Units/Rail  
EIAJ–16  
SOIC  
EIAJ–16  
MC74VHCT595AMEL  
2000 Units/Reel  
This document contains information on a product under development. Motorola reserves  
the right to change or discontinue this product without notice.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
May, 2000 – Rev. 0  
MC74VHCT595A/D  
1234567...12

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