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MC74VHCT573ADTRG PDF预览

MC74VHCT573ADTRG

更新时间: 2024-11-23 05:22:07
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
7页 98K
描述
Octal D−Type Latch with 3−State Output

MC74VHCT573ADTRG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.1
系列:AHCT/VHCTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):14.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

MC74VHCT573ADTRG 数据手册

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MC74VHCT573A  
Octal D−Type Latch  
with 3−State Output  
The MC74VHCT573A is an advanced high speed CMOS octal latch  
with 3−state output fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining CMOS low power dissipation.  
http://onsemi.com  
This 8−bit D−type latch is controlled by a latch enable input and an  
output enable input. When the output enable input is high, the eight  
outputs are in a high impedance state.  
The VHCT inputs are compatible with TTL levels. This device can  
be used as a level converter for interfacing 3.3 V to 5.0 V, because it  
has full 5.0 V CMOS level output swings.  
The VHCT573A input and output (when disabled) structures  
provide protection when voltages between 0 V and 5.5 V are applied,  
regardless of the supply voltage. These input and output structures  
help prevent device destruction caused by supply  
voltage−input/output voltage mismatch, battery backup, hot insertion,  
etc.  
MARKING  
DIAGRAMS  
20  
1
VHCT573A  
AWLYYWWG  
SOIC−20WB  
SUFFIX DW  
CASE 751D  
1
Features  
20  
High Speed: t = 7.7 ns (Typ) at V = 5.0 V  
PD  
CC  
VHCT  
573A  
ALYWG  
G
Low Power Dissipation: I = 4 mA (Max) at T = 25°C  
CC  
A
1
TSSOP−20  
SUFFIX DT  
CASE 948E  
TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V  
IL  
IH  
Power Down Protection Provided on Inputs and Outputs  
Balanced Propagation Delays  
1
Designed for 4.5 V to 5.5 V Operating Range  
Low Noise: V  
= 1.6 V (Max)  
OLP  
A
= Assembly Location  
= Wafer Lot  
WL, L  
YY, Y  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
= Year  
WW, W = Work Week  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ESD Performance:  
Human Body Model > 2000 V;  
Machine Model > 200 V  
Chip Complexity: 234 FETs or 58.5 Equivalent Gates  
Pb−Free Packages are Available*  
FUNCTION TABLE  
INPUTS  
LE  
OUTPUT  
Q
OE  
D
L
L
L
H
H
L
H
L
X
X
H
L
No Change  
Z
H
X
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
January, 2006 − Rev. 4  
MC74VHCT573A/D  

MC74VHCT573ADTRG 替代型号

型号 品牌 替代类型 描述 数据表
MC74VHCT573ADTG ONSEMI

完全替代

Octal D−Type Latch with 3−State Output
SN74AHCT573PWR TI

类似代替

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AHCT573PW TI

类似代替

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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