Datasheet > 逻辑 > 总线驱动器/收发器> MC74VHCT245A

MC74VHCT245A

更新时间： 2024-11-03 23:05:47

品牌	Logo	应用领域
安森美 - ONSEMI		总线收发器
页数	文件大小	规格书
6页	167K
描述
Octal Bus Transceiver

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数据手册

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MC74VHCT245A 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC74VHCT245A is an advanced high speed CMOS octal bus

transceiver fabricated with silicon gate CMOS technology. It achieves high

speed operation similar to equivalent Bipolar Schottky TTL while maintaining

CMOS low power dissipation.

It is intended for two–way asynchronous communication between data

buses. The direction of data transmission is determined by the level of the

DIR input. The output enable pin (OE) can be used to disable the device, so

that the buses are effectively isolated.

All inputs are equipped with protection circuits against static discharge.

The VHCT inputs are compatible with TTL levels. This device can be used

as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS

level output swings.

DW SUFFIX

20–LEAD SOIC PACKAGE

CASE 751D–04

The VHCT245A input and output (when disabled) structures provide

protection when voltages between 0V and 5.5V are applied, regardless of

the supply voltage. These input and output structures help prevent device

destruction caused by supply voltage – input/output voltage mismatch,

battery backup, hot insertion, etc.

DT SUFFIX

20–LEAD TSSOP PACKAGE

CASE 948E–02

•

High Speed: t

= 4.9ns (Typ) at V

= 5V

Low Power Dissipation: I

= 4µA (Max) at T = 25°C

TTL–Compatible Inputs: V = 0.8V; V = 2.0V

Power Down Protection Provided on Inputs and Outputs

Balanced Propagation Delays

Designed for 4.5V to 5.5V Operating Range

IL IH

M SUFFIX

20–LEAD SOIC EIAJ PACKAGE

CASE 967–01

Low Noise: V

= 1.6V (Max)

OLP

ORDERING INFORMATION

Pin and Function Compatible with Other Standard Logic Families

Latchup Performance Exceeds 300mA

ESD Performance: HBM > 2000V; Machine Model > 200V

Chip Complexity: 304 FETs or 76 Equivalent Gates

MC74VHCTXXXADW

MC74VHCTXXXADT

MC74VHCTXXXAM

SOIC

TSSOP

SOIC EIAJ

APPLICATION NOTES

PIN ASSIGNMENT

1. Do not force a signal on an I/O pin when it is an active output, damage may

occur.

DIR

2. All floating (high impedence) input or I/O pins must be fixed by means of

pull up or pull down resistors or bus terminator ICs.

LOGIC DIAGRAM

DATA

PORT

DATA

PORT

GND

FUNCTION TABLE

Control Inputs

DIR

Operation

Data Tx from Bus B to Bus A

Data Tx from Bus A to Bus B

Buses Isolated (High–Z State)

6/97

Motorola, Inc. 1997

REV 0

12 3 4 5 6

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与MC74VHCT245A相关器件

型号	品牌	获取价格	描述	数据表
MC74VHCT245A_06	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADT	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADTG	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADTR2	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADTRG	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADW	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADWG	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADWR2	ONSEMI	获取价格	Octal Bus Transceiver
MC74VHCT245ADWR2G	ONSEMI	获取价格	AHCT/VHCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, SOIC-20
MC74VHCT245ADWRG	ONSEMI	获取价格	Octal Bus Transceiver

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