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MC74VHCT14A

更新时间： 2024-11-19 23:05:47
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 151K
描述
Hex Schmitt Inverter

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MC74VHCT14A 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74VHCT14A is an advanced high speed CMOS Schmitt inverter  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
Pin configuration and function are the same as the MC74VHCT04A, but  
the inputs have hysteresis and, with its Schmitt trigger function, the  
VHCT14A can be used as a line receiver which will receive slow input  
signals.  
D SUFFIX  
14–LEAD SOIC PACKAGE  
CASE 751A–03  
The VHCT inputs are compatible with TTL levels. This device can be used  
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS  
level output swings.  
The VHCT14A input structures provide protection when voltages between  
0V and 5.5V are applied, regardless of the supply voltage. The output  
DT SUFFIX  
14–LEAD TSSOP PACKAGE  
CASE 948G–01  
structures also provide protection when V  
= 0V. These input and output  
CC  
structures help prevent device destruction caused by supply voltage –  
input/output voltage mismatch, battery backup, hot insertion, etc.  
The internal circuit is composed of three stages, including a buffer output  
which provides high noise immunity and stable output. The inputs tolerate  
voltages up to 7V, allowing the interface of 5V systems to 3V systems.  
•
•
•
•
•
•
•
•
•
•
•
High Speed: t  
= 5.5ns (Typ) at V  
= 5V  
PD  
Low Power Dissipation: I  
CC  
= 2µA (Max) at T = 25°C  
M SUFFIX  
14–LEAD SOIC EIAJ PACKAGE  
CASE 965–01  
CC  
A
TTL–Compatible Inputs: V = 0.8V; V = 2.0V  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
Designed for 2V to 5.5V Operating Range  
IL IH  
ORDERING INFORMATION  
MC74VHCTXXAD  
MC74VHCTXXADT TSSOP  
MC74VHCTXXAM SOICEIAJ  
SOIC  
Low Noise: V  
= 0.8V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
Chip Complexity: 60 FETs or 15 Equivalent Gates  
FUNCTION TABLE  
Inputs  
A
Outputs  
Y
LOGIC DIAGRAM  
L
H
L
1
3
5
2
4
6
A1  
A2  
A3  
Y1  
Y2  
Y3  
H
Pinout: 14–Lead Packages (Top View)  
V
A6  
Y6  
A5  
Y5  
A4  
Y4  
CC  
14  
13  
12  
11  
10  
9
8
Y = A  
9
8
10  
12  
A4  
A5  
A6  
Y4  
Y5  
Y6  
11  
13  
1
2
3
4
5
6
7
A1  
Y1  
A2  
Y2  
A3  
Y3  
GND  
4/99  
REV 0  
Motorola, Inc. 1999  
12345678

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