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MC74VHCT132AMELG

更新时间： 2024-11-25 05:22:07
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
6页 101K
描述
Quad 2−Input NAND Schmitt Trigger

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MC74VHCT132AMELG 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP14,.3
针数：14Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.64
系列：AHCT/VHCTJESD-30 代码：R-PDSO-G14
JESD-609代码：e4长度：10.2 mm
负载电容（CL）：50 pF逻辑集成电路类型：NAND GATE
最大I（ol）：0.008 A湿度敏感等级：3
功能数量：4输入次数：2
端子数量：14最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP14,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V最大电源电流（ICC）：1.65 mA
Prop。Delay @ Nom-Sup：11 ns传播延迟（tpd）：17.5 ns
认证状态：Not Qualified施密特触发器：YES
座面最大高度：2.05 mm子类别：Gates
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5.275 mm
Base Number Matches：1

MC74VHCT132AMELG 数据手册

 浏览型号MC74VHCT132AMELG的Datasheet PDF文件第2页浏览型号MC74VHCT132AMELG的Datasheet PDF文件第3页浏览型号MC74VHCT132AMELG的Datasheet PDF文件第4页浏览型号MC74VHCT132AMELG的Datasheet PDF文件第5页浏览型号MC74VHCT132AMELG的Datasheet PDF文件第6页 
MC74VHCT132A  
Quad 2−Input NAND Schmitt  
Trigger  
The MC74VHCT132A is an advanced high speed CMOS Schmitt  
NAND trigger fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining CMOS low power dissipation.  
Pin configuration and function are the same as the MC74VHC00,  
but the inputs have hysteresis and, with its Schmitt trigger function,  
the VHCT132A can be used as a line receiver which will receive slow  
input signals.  
The VHCT inputs are compatible with TTL levels. This device can  
be used as a level converter for interfacing 3.3 V to 5.0 V, because it  
has full 5.0 V CMOS level output swings.  
The VHCT132A input structures provide protection when voltages  
between 0 V and 5.5 V are applied, regardless of the supply voltage.  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
1
SOIC−14  
D SUFFIX  
CASE 751A  
VHCT132AG  
AWLYWW  
1
The output structures also provide protection when V = 0 V. These  
CC  
14  
input and output structures help prevent device destruction caused by  
supply voltage − input/output voltage mismatch, battery backup, hot  
insertion, etc.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V  
systems to 3.0 V systems.  
VHCT  
132A  
ALYWG  
G
TSSOP−14  
DT SUFFIX  
CASE 948G  
1
1
14  
Features  
SOEIAJ−14  
M SUFFIX  
CASE 965  
VHCT132  
ALYWG  
• High Speed: t = 4.9 ns (Typ) at V = 5.0 V  
PD  
CC  
1
• Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
1
• TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V  
IL  
IH  
• Power Down Protection Provided on Inputs  
• Balanced Propagation Delays  
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
• Designed for 2.0 V to 5.5 V Operating Range  
• Low Noise: V  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300 mA  
• ESD Performance:  
WW, W = Work Week  
= Pb−Free Package  
(Note: Microdot may be in either location)  
G or G  
= 0.8 V (Max)  
OLP  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
Human Body Model > 2000 V;  
Machine Model > 200 V  
• Chip Complexity: 72 FETs or 18 Equivalent Gates  
• Pb−Free Packages are Available*  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
January, 2006 − Rev. 4  
MC74VHCT132A/D  
123456

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