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MC74VHCT08AM PDF预览

MC74VHCT08AM

更新时间: 2024-09-14 23:05:47
品牌 Logo 应用领域
安森美 - ONSEMI 栅极
页数 文件大小 规格书
8页 147K
描述
Quad 2-Input AND Gate

MC74VHCT08AM 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:EIAJ, SO-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.28
Is Samacsys:N系列:AHCT/VHCT
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:AND GATE最大I(ol):0.008 A
湿度敏感等级:3功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:RAIL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:9 ns传播延迟(tpd):14 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.05 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.275 mm
Base Number Matches:1

MC74VHCT08AM 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74VHCT08A is an advanced high speed CMOS 2–input AND gate  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
The VHCT inputs are compatible with TTL levels. This device can be used  
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS  
level output swings.  
The VHCT08A input structures provide protection when voltages between  
0V and 5.5V are applied, regardless of the supply voltage. The output  
D SUFFIX  
14–LEAD SOIC PACKAGE  
CASE 751A–03  
structures also provide protection when V  
structures help prevent device destruction caused by supply voltage –  
input/output voltage mismatch, battery backup, hot insertion, etc.  
= 0V. These input and output  
CC  
The internal circuit is composed of three stages, including a buffer output  
which provides high noise immunity and stable output. The inputs tolerate  
voltages up to 7V, allowing the interface of 5V systems to 3V systems.  
DT SUFFIX  
14–LEAD TSSOP PACKAGE  
CASE 948G–01  
High Speed: t  
= 4.3ns (Typ) at V  
= 5V  
PD  
Low Power Dissipation: I  
CC  
= 2µA (Max) at T = 25°C  
CC  
A
TTL–Compatible Inputs: V = 0.8V; V = 2.0V  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
IL IH  
M SUFFIX  
14–LEAD SOIC EIAJ PACKAGE  
CASE 965–01  
Designed for 2V to 5.5V Operating Range  
Low Noise: V  
= 0.8V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
Chip Complexity: 24 FETs or 6 Equivalent Gates  
ORDERING INFORMATION  
MC74VHCTXXAD  
MC74VHCTXXADT  
MC74VHCTXXAM  
SOIC  
TSSOP  
SOICEIAJ  
LOGIC DIAGRAM  
1
A1  
3
FUNCTION TABLE  
Y1  
Y2  
Y3  
Y4  
2
B1  
Inputs  
Output  
Y
4
5
A2  
B2  
A
B
6
8
L
L
L
H
L
L
L
Y = AB  
9
A3  
B3  
H
H
L
10  
H
H
12  
13  
A4  
B4  
11  
Pinout: 14–Lead Packages (Top View)  
V
B4  
13  
A4  
12  
Y4  
11  
B3  
10  
A3  
9
Y3  
8
CC  
14  
1
2
3
4
5
6
7
A1  
B1  
Y1  
A2  
B2  
Y2  
GND  
4/99  
REV 0  
Motorola, Inc. 1999  

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