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MC74VHC245MR2 PDF预览

MC74VHC245MR2

更新时间: 2024-11-04 03:04:19
品牌 Logo 应用领域
安森美 - ONSEMI 总线收发器
页数 文件大小 规格书
8页 178K
描述
Octal Bus Transceiver

MC74VHC245MR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:EIAJ, SOIC-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.41
系列:AHC/VHCJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:12.575 mm
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):13.5 ns认证状态:Not Qualified
座面最大高度:2.05 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.275 mm

MC74VHC245MR2 数据手册

 浏览型号MC74VHC245MR2的Datasheet PDF文件第2页浏览型号MC74VHC245MR2的Datasheet PDF文件第3页浏览型号MC74VHC245MR2的Datasheet PDF文件第4页浏览型号MC74VHC245MR2的Datasheet PDF文件第5页浏览型号MC74VHC245MR2的Datasheet PDF文件第6页浏览型号MC74VHC245MR2的Datasheet PDF文件第7页 
ON Semiconductort  
MC74VHC245  
Octal Bus Transceiver  
The MC74VHC245 is an advanced high speed CMOS octal bus  
transceiver fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
It is intended for twoway asynchronous communication between  
data buses. The direction of data transmission is determined by the  
level of the DIR input. The output enable pin (OE) can be used to  
disable the device, so that the buses are effectively isolated.  
All inputs are equipped with protection circuits against static  
discharge.  
DW SUFFIX  
20LEAD SOIC WIDE PACKAGE  
CASE 751D05  
High Speed: t = 4.0ns (Typ) at V = 5V  
PD  
CC  
DT SUFFIX  
20LEAD TSSOP PACKAGE  
CASE 948E02  
Low Power Dissipation: I = 4μA (Max) at T = 25°C  
CC  
A
High Noise Immunity: V  
= V = 28% V  
NIL CC  
NIH  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
Designed for 2V to 5.5V Operating Range  
Low Noise: V  
= 1.2V (Max)  
OLP  
M SUFFIX  
20LEAD SOIC EIAJ PACKAGE  
CASE 96701  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
Chip Complexity: 308 FETs or 77 Equivalent Gates  
w These devices are available in Pbfree package(s). Specifications herein  
apply to both standard and Pbfree devices. Please see our website at  
www.onsemi.com for specific Pbfree orderable part numbers, or  
contact your local ON Semiconductor sales office or representative.  
ORDERING INFORMATION  
MC74VHCXXXDW  
MC74VHCXXXDT  
MC74VHCXXXM  
SOIC WIDE  
TSSOP  
SOIC EIAJ  
APPLICATION NOTES  
Do not force a signal on an I/O pin when it is an active output,  
damage may occur.  
All floating (high impedance) input or I/O pins must be fixed by  
means of pull up or pull down resistors or bus terminator ICs.  
A parasitic diode is formed between the bus and V terminals.  
CC  
Therefore, the VHC245 cannot be used to interface 5V to 3V systems  
directly.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 Rev. 5  
MC74VHC245/D  

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