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MC74VHC1GU04DF1G PDF预览

MC74VHC1GU04DF1G

更新时间: 2024-11-04 12:48:51
品牌 Logo 应用领域
安森美 - ONSEMI 栅极逻辑集成电路光电二极管
页数 文件大小 规格书
6页 72K
描述
Single Unbuffered Inverter

MC74VHC1GU04DF1G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:TSSOP,
针数:5Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.56系列:HC
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2 mm逻辑集成电路类型:INVERTER
湿度敏感等级:1功能数量:1
输入次数:1端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):15.5 ns
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.25 mmBase Number Matches:1

MC74VHC1GU04DF1G 数据手册

 浏览型号MC74VHC1GU04DF1G的Datasheet PDF文件第2页浏览型号MC74VHC1GU04DF1G的Datasheet PDF文件第3页浏览型号MC74VHC1GU04DF1G的Datasheet PDF文件第4页浏览型号MC74VHC1GU04DF1G的Datasheet PDF文件第5页浏览型号MC74VHC1GU04DF1G的Datasheet PDF文件第6页 
MC74VHC1GU04  
Single Unbuffered Inverter  
The MC74VHC1GU04 is an advanced high speed CMOS  
Unbuffered inverter fabricated with silicon gate CMOS technology.  
This device consists of a single unbuffered inverter. In combination  
with others, or in the MC74VHCU04 Hex Unbuffered Inverter, these  
devices are well suited for use as oscillators, pulse shapers, and in  
many other applications requiring a high−input impedance amplifier.  
For digital applications, the MC74VHC1G04 or the MC74VHC04 are  
recommended.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The MC74VHC1GU04 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1GU04 to be used to interface 5 V circuits to  
3 V circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
5
5
1
V6 M G  
SC−88A/SOT−353/SC−70  
DF SUFFIX  
G
CASE 419A  
1
5
Features  
High Speed: t = 2.5 ns (Typ) at V = 5 V  
PD  
CC  
5
V6 M G  
Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
G
Power Down Protection Provided on Inputs  
1
TSOP−5/SOT−23/SC−59  
DT SUFFIX  
1
Balanced Propagation Delays  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FETs = 105  
CASE 483  
Pb−Free Packages are Available  
V6 = Device Code  
M
G
= Date Code*  
= Pb−Free Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may vary  
depending upon manufacturing location.  
V
1
2
3
NC  
IN A  
GND  
CC  
5
4
PIN ASSIGNMENT  
1
2
3
4
5
NC  
IN A  
OUT Y  
GND  
OUT Y  
V
CC  
Figure 1. Pinout  
FUNCTION TABLE  
1
A Input  
Y Output  
IN A  
OUT Y  
L
H
L
Figure 2. Logic Symbol  
H
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
February, 2007 − Rev. 16  
MC74VHC1GU04/D  

MC74VHC1GU04DF1G 替代型号

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