with LSTTL–Compatible Inputs
The MC74VHC1GT04 is a single gate inverting buffer fabricated
with silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS
low power dissipation.
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MARKING
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and
the output has a full 5V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logic–level translator from
3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to
3.0V CMOS Logic while operating at the high–voltage power supply.
The MC74VHC1GT04 input structure provides protection when
voltages up to 7V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT04 to be used to interface 5V circuits to 3V
DIAGRAMS
SC–88A / SOT–353/SC–70
DF SUFFIX
d
VK
CASE 419A
Pin 1
d = Date Code
TSOP–5/SOT–23/SC–59
DT SUFFIX
d
VK
circuits. The output structures also provide protection when V
= 0V.
CC
CASE 483A
These input and output structures help prevent device destruction
caused by supply voltage – input/output voltage mismatch, battery
backup, hot insertion, etc.
Pin 1
d = Date Code
• High Speed: t
= 3.8ns (Typ) at V
= 5V
PD
• Low Power Dissipation: I
CC
= 2µA (Max) at T = 25°C
CC
A
PIN ASSIGNMENT
• TTL–Compatible Inputs: V = 0.8V; V = 2.0V
IL
IH
1
2
3
4
5
NC
IN A
GND
• CMOS–CompatibleOutputs: V
> 0.8V ; V < 0.1V @Load
OH
CC OL CC
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
OUT Y
VCC
• ESD Performance: HBM > 1500V; MM > 200V
ORDERING INFORMATION
NC
IN A
GND
VCC
1
2
3
5
Seedetailedorderingandshippinginformationinthepackage
dimensions section on page 4 of this data sheet.
OUT Y
4
Figure 1. 5–Lead SOT–353 Pinout (Top View)
FUNCTION TABLE
A Input
Y Output
LOGIC SYMBOL
L
H
L
1
IN A
OUT Y
H
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
June, 2000 – Rev. 2
MC74VHC1GT04/D