Datasheet > MC74VHC1GT04DFT4

MC74VHC1GT04DFT4

更新时间： 2024-11-04 05:30:07

品牌	Logo	应用领域
ETL		转换器电平转换器
页数	文件大小	规格书
4页	581K
描述
Inverting Buffer / CMOS Logic Level Shifter with LSTTL-Compatible Inputs

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MC74VHC1GT04DFT4 数据手册

Inverting Buffer / CMOS Logic Level Shifter

with LSTTL–Compatible Inputs

MC74VHC1GT04

The MC74VHC1GT04 is a single gate inverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation

similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.

The device input is compatible with TTL–type input thresholds and the output has a full 5 V CMOS level output swing. The input

protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from

3.0 V CMOS logic to 5.0V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power supply.

The MC74VHC1GT04 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT04 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when

_CC= 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch,

battery backup, hot insertion, etc.

• High Speed: t _PD= 3.8 ns (Typ) at V _CC= 5 V

• Balanced Propagation Delays

• Pin and Function Compatible with Other Standard Logic

Families

• Low Power Dissipation: I _CC= 2 mA (Max) at T _A= 25°C

• TTL–Compatible Inputs: V _IL= 0.8 V; V _IH= 2.0 V

• CMOS–Compatible Outputs: V _OH> 0.8 V _CC

V _OL< 0.1 V _CC@Load

;

• Chip Complexity: FETs = 105; Equivalent Gates = 26

PIN ASSIGNMENT

• Power Down Protection Provided on Inputs and Outputs

MARKING DIAGRAMS

VK^d

SC–70/SC–88A/SOT–353

DF SUFFIX

CASE 419A

Pin 1

d = Date Code

Figure 1. Pinout (Top View)

VK^d

Figure 2. Logic Symbol

SOT–23/TSOP–5/SC–59

DT SUFFIX

CASE 483

Pin 1

d = Date Code

FUNCTION TABLE

PIN ASSIGNMENT

Inputs

Output

IN A

GND

OUT Y

V _CC

ORDERING INFORMATION

See detailed ordering and shipping information in the

package dimensions section on page 4 of this data sheet.

VHT4–1/4

12 3 4

中文翻译

下载PDF

与MC74VHC1GT04DFT4相关器件

型号	品牌	获取价格	描述	数据表
MC74VHC1GT04DT1G	ONSEMI	获取价格	Inverting Buffer CMOS Logic Level Shifter
MC74VHC1GT04DTR2	MOTOROLA	获取价格	AHC/VHC SERIES, 1-INPUT INVERT GATE, PDSO5, SC-59, SOT-23, TSOP-5
MC74VHC1GT04DTT1	ONSEMI	获取价格	Inverting Buffer / CMOS Logic Level Shifter CMOS Logic Level Shifter
MC74VHC1GT04DTT1	ETL	获取价格	Inverting Buffer / CMOS Logic Level Shifter with LSTTL-Compatible Inputs
MC74VHC1GT04DTT2	MOTOROLA	获取价格	AHC/VHC SERIES, 1-INPUT INVERT GATE, PDSO5, SC-59, SOT-23, TSOP-5
MC74VHC1GT04DTT3	ETL	获取价格	Inverting Buffer / CMOS Logic Level Shifter with LSTTL-Compatible Inputs
MC74VHC1GT04MU1TCG	ONSEMI	获取价格	Single Inverter
MC74VHC1GT04MU2TCG	ONSEMI	获取价格	Single Inverter
MC74VHC1GT04MU3TCG	ONSEMI	获取价格	Single Inverter
MC74VHC1GT04P5T5G	ONSEMI	获取价格	Single Inverter

与MC74VHC1GT04DFT4相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

7
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

33
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

30

产品中心

服务支持

精选活动

关于我们

帮助中心

MC74VHC1GT04DFT4

MC74VHC1GT04DFT4 数据手册

与MC74VHC1GT04DFT4相关器件

与MC74VHC1GT04DFT4相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MC74VHC1GT04DFT4

MC74VHC1GT04DFT4 数据手册

与MC74VHC1GT04DFT4相关器件

与MC74VHC1GT04DFT4相关文章

您还可以找

您在本页遇到什么问题？