5秒后页面跳转
MC74VHC138DG PDF预览

MC74VHC138DG

更新时间: 2024-02-07 15:45:19
品牌 Logo 应用领域
安森美 - ONSEMI 解码器驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 137K
描述
3-to-8 Line Decoder

MC74VHC138DG 技术参数

生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:unknown风险等级:5.65
Is Samacsys:N系列:AHC/VHC
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
长度:10.2 mm逻辑集成电路类型:OTHER DECODER/DRIVER
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):18 ns
认证状态:COMMERCIAL座面最大高度:2.05 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:5.275 mm
Base Number Matches:1

MC74VHC138DG 数据手册

 浏览型号MC74VHC138DG的Datasheet PDF文件第2页浏览型号MC74VHC138DG的Datasheet PDF文件第3页浏览型号MC74VHC138DG的Datasheet PDF文件第4页浏览型号MC74VHC138DG的Datasheet PDF文件第5页浏览型号MC74VHC138DG的Datasheet PDF文件第6页浏览型号MC74VHC138DG的Datasheet PDF文件第7页 
MC74VHC138  
3-to-8 Line Decoder  
The MC74VHC138 is an advanced high speed CMOS 3to8  
decoder fabricated with silicon gate CMOS technology. It achieves  
high speed operation similar to equivalent Bipolar Schottky TTL  
while maintaining CMOS low power dissipation.  
When the device is enabled, three Binary Select inputs (A0 A2)  
determine which one of the outputs (Y0 Y7) will go Low. When  
enable input E3 is held Low or either E2 or E1 is held High, decoding  
function is inhibited and all outputs go high. E3, E2, and E1 inputs are  
provided to ease cascade connection and for use as an address decoder  
for memory systems.  
http://onsemi.com  
MARKING DIAGRAMS  
16  
9
VHC138G  
AWLYWW  
SOIC16  
D SUFFIX  
CASE 751B  
1
8
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7V, allowing the interface of 5V systems  
to 3V systems.  
16  
9
VHC  
138  
TSSOP16  
DT SUFFIX  
CASE 948F  
High Speed: t = 5.7ns (Typ) at V = 5 V  
PD  
CC  
ALYW G  
Low Power Dissipation: I = 4 μA (Max) at T = 25°C  
CC  
A
G
1
High Noise Immunity: V  
= V  
= 28% V  
NIH  
NIL CC  
8
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
VHC138 = Specific Device Code  
= Assembly Location  
WL, L = Wafer Lot  
= Year  
WW, W = Work Week  
G or G = PbFree Package  
A
Designed for 2 V to 5.5 V Operating Range  
Low Noise: V  
= 0.8 V (Max)  
Y
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
Chip Complexity: 122 FETs or 30.5 Equivalent Gates  
These Devices are PbFree and are RoHS Compliant  
ORDERING INFORMATION  
Device  
Package  
Shipping  
48 Units/Rail  
MC74VHC138DG  
SOIC16  
MC74VHC138DR2G SOIC16 2500 Units/Reel  
MC74VHC138DTR2G TSSOP16 2500 Units/Reel  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
May, 2011 Rev. 5  
MC74VHC138/D  

MC74VHC138DG 替代型号

型号 品牌 替代类型 描述 数据表
MC74VHC138DR2G ONSEMI

完全替代

3-to-8 Line Decoder
MC74VHC138D ONSEMI

完全替代

3-To-8 Line Decoder
SN74AHC138DR TI

功能相似

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

与MC74VHC138DG相关器件

型号 品牌 获取价格 描述 数据表
MC74VHC138DR2 ONSEMI

获取价格

3-To-8 Line Decoder
MC74VHC138DR2G ONSEMI

获取价格

3-to-8 Line Decoder
MC74VHC138DT ONSEMI

获取价格

3-To-8 Line Decoder
MC74VHC138DT MOTOROLA

获取价格

3-to-8 Line Decoder
MC74VHC138DTEL ONSEMI

获取价格

IC,DECODER/DEMUX,3-TO-8-LINE,AHC/VHC-CMOS,TSSOP,16PIN,PLASTIC
MC74VHC138DTR2 ONSEMI

获取价格

3-To-8 Line Decoder
MC74VHC138DTR2G ONSEMI

获取价格

3-to-8 Line Decoder
MC74VHC138M MOTOROLA

获取价格

3-to-8 Line Decoder
MC74VHC138M ONSEMI

获取价格

3-To-8 Line Decoder
MC74VHC138MEL ONSEMI

获取价格

3-To-8 Line Decoder