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MC74VHC132DTR2 PDF预览

MC74VHC132DTR2

更新时间: 2024-11-04 05:22:11
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 101K
描述
Quad 2−Input NAND Schmitt Trigger

MC74VHC132DTR2 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:LEAD FREE, TSSOP-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.19
Is Samacsys:N系列:AHC/VHC
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.008 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:2/5.5 V
Prop。Delay @ Nom-Sup:11 ns传播延迟(tpd):17.5 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

MC74VHC132DTR2 数据手册

 浏览型号MC74VHC132DTR2的Datasheet PDF文件第2页浏览型号MC74VHC132DTR2的Datasheet PDF文件第3页浏览型号MC74VHC132DTR2的Datasheet PDF文件第4页浏览型号MC74VHC132DTR2的Datasheet PDF文件第5页浏览型号MC74VHC132DTR2的Datasheet PDF文件第6页 
MC74VHC132  
Quad 2−Input NAND Schmitt  
Trigger  
The MC74VHC132 is an advanced high speed CMOS Schmitt  
NAND trigger fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining CMOS low power dissipation.  
Pin configuration and function are the same as the MC74VHC00,  
but the inputs have hysteresis and, with its Schmitt trigger function,  
the VHC132 can be used as a line receiver which will receive slow  
input signals.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V  
systems to 3.0 V systems.  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
1
SOIC−14  
D SUFFIX  
CASE 751A  
VHC132G  
AWLYWW  
1
Features  
14  
High Speed: t = 4.9 ns (Typ) at V = 5.0 V  
PD  
CC  
VHC  
132  
TSSOP−14  
DT SUFFIX  
CASE 948G  
Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
ALYWG  
High Noise Immunity: V  
= V  
= 28% V  
NIH  
NIL CC  
1
G
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
1
Designed for 2.0 V to 5.5 V Operating Range  
14  
Low Noise: V  
= 0.8 V (Max)  
OLP  
SOEIAJ−14  
M SUFFIX  
CASE 965  
VHC132  
ALYWG  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
1
1
ESD Performance:  
Human Body Model > 2000 V;  
Machine Model > 200 V  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
Chip Complexity: 72 FETs or 18 Equivalent Gates  
Pb−Free Packages are Available*  
= Year  
WW, W = Work Week  
= Pb−Free Package  
(Note: Microdot may be in either location)  
G or G  
V
B4  
13  
A4  
12  
Y4  
11  
B3  
10  
A3  
9
Y3  
8
CC  
14  
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
L
L
H
H
L
H
L
H
H
H
L
H
1
2
3
4
5
6
7
A1  
B1  
Y1  
A2  
B2  
Y2 GND  
(Top View)  
Figure 1. Pinout: 14−Lead Packages  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
December, 2005 − Rev. 3  
MC74VHC132/D  

MC74VHC132DTR2 替代型号

型号 品牌 替代类型 描述 数据表
74VHC132MTCX ONSEMI

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