High–Performance Silicon–Gate CMOS
The MC74LVXT8051 utilizes silicon–gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low OFF
leakage currents. This analog multiplexer/demultiplexer controls
analog voltages that may vary across the complete power supply range
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(from V
to GND).
CC
The LVXT8051 is similar in pinout to the high–speed HC4051A
and the metal–gate MC14051B. The Channel–Select inputs determine
which one of the Analog Inputs/Outputs is to be connected by means
of an analog switch to the Common Output/Input. When the Enable
pin is HIGH, all analog switches are turned off.
16–LEAD SOIC
D SUFFIX
CASE 751B
16–LEAD TSSOP
DT SUFFIX
CASE 948F
The Channel–Select and Enable inputs are compatible with
TTL–type input thresholds. The input protection circuitry on this
device allows overvoltage tolerance on the input, allowing the device
to be used as a logic–level translator from 3.0V CMOS logic to 5.0V
CMOS Logic or from 1.8V CMOS logic to 3.0V CMOS Logic while
operating at the higher–voltage power supply.
PIN CONNECTION AND
MARKING DIAGRAM (Top View)
V
X2
15
X1
14
X0
13
X3
12
A
B
C
9
CC
16
11
10
The MC74LVXT8051 input structure provides protection when voltages
up to 7V are applied, regardless of the supply voltage. This allows the
MC74LVXT8051 to be used to interface 5V circuits to 3V circuits.
1
2
3
4
5
6
7
8
This device has been designed so that the ON resistance (R ) is more
on
X4
X6
X
X7
X5 Enable NC GND
linear over input voltage than R of metal–gate CMOS analog switches.
on
For detailed package marking information, see the Marking
Diagram section on page 11 of this data sheet.
• Fast Switching and Propagation Speeds
• Low Crosstalk Between Switches
• Diode Protection on All Inputs/Outputs
FUNCTION TABLE – MC74LVXT8051
• Analog Power Supply Range (V
– GND) = 2.0 to 6.0 V
CC
Control Inputs
• Digital (Control) Power Supply Range (V
CC
• Improved Linearity and Lower ON Resistance Than Metal–Gate
Counterparts
• Low Noise
– GND) = 2.0 to 6.0 V
Select
Enable
C
B
A
ON Channels
L
L
L
L
L
L
L
L
H
L
L
L
L
L
H
H
L
L
H
L
H
L
H
L
H
X
X0
X1
X2
X3
X4
X5
X6
X7
NONE
• In Compliance With the Requirements of JEDEC Standard No. 7A
L
H
H
H
H
X
LOGIC DIAGRAM
MC74LVXT8051
Single–Pole, 8–Position Plus Common Off
L
H
H
X
13
X0
X = Don’t Care
14
X1
15
3
X2
X3
X4
X5
X6
X7
A
COMMON
OUTPUT/
INPUT
X
ANALOG
INPUTS/
12
1
ORDERING INFORMATION
MULTIPLEXER/
DEMULTIPLEXER
OUTPUTS
Device
Package
SOIC
Shipping
5
2
MC74LVXT8051D
MC74LVXT8051DR2
MC74LVXT8051DT
48 Units/Rail
2500 Units/Reel
96 Units/Rail
4
SOIC
11
10
9
CHANNEL
SELECT
INPUTS
TSSOP
B
C
PIN 16 = V
CC
PIN 8 = GND
MC74LVXT8051DTR2 TSSOP 2500 Units/Reel
6
ENABLE
Semiconductor Components Industries, LLC, 1999
1
Publication Order Number:
March, 2000 – Rev. 2
MC74LVXT8051/D