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MC74LVXT4051DG PDF预览

MC74LVXT4051DG

更新时间: 2024-11-15 03:18:27
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器
页数 文件大小 规格书
14页 149K
描述
Analog Multiplexer/Demultiplexer High−Performance Silicon−Gate CMOS

MC74LVXT4051DG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.25
模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXERJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.9 mm
湿度敏感等级:1负电源电压最大值(Vsup):-6 V
负电源电压最小值(Vsup):标称负供电电压 (Vsup):-3 V
信道数量:8功能数量:1
端子数量:16标称断态隔离度:70 dB
通态电阻匹配规范:15 Ω最大通态电阻 (Ron):37 Ω
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Multiplexer or Switches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3 V表面贴装:YES
最长断开时间:28 ns最长接通时间:28 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9 mm

MC74LVXT4051DG 数据手册

 浏览型号MC74LVXT4051DG的Datasheet PDF文件第2页浏览型号MC74LVXT4051DG的Datasheet PDF文件第3页浏览型号MC74LVXT4051DG的Datasheet PDF文件第4页浏览型号MC74LVXT4051DG的Datasheet PDF文件第5页浏览型号MC74LVXT4051DG的Datasheet PDF文件第6页浏览型号MC74LVXT4051DG的Datasheet PDF文件第7页 
MC74LVXT4051  
Analog Multiplexer/  
Demultiplexer  
High−Performance Silicon−Gate CMOS  
The MC74LVXT4051 utilizes silicon−gate CMOS technology to  
achieve fast propagation delays, low ON resistances, and low leakage  
currents. This analog multiplexer/demultiplexer controls analog  
voltages that may vary across the complete power supply range (from  
http://onsemi.com  
MARKING  
DIAGRAMS  
V
CC  
to V ).  
EE  
The LVXT4051 is similar in pinout to the LVX8051, the HC4051A,  
and the metal−gate MC14051B. The Channel−Select inputs determine  
which one of the Analog Inputs/Outputs is to be connected, by means  
of an analog switch, to the Common Output/Input. When the Enable  
pin is HIGH, all analog switches are turned off.  
The Channel−Select and Enable inputs are compatible with standard  
TTL levels. These inputs are over−voltage tolerant (OVT) for level  
translation from 6.0 V down to 3.0 V.  
16  
SOIC−16  
D SUFFIX  
CASE 751B  
LVXT4051  
AWLYWW  
1
This device has been designed so the ON resistance (R ) is more  
ON  
16  
linear over input voltage than the R of metal−gate CMOS analog  
ON  
LVXT  
4051  
ALYW  
TSSOP−16  
DT SUFFIX  
CASE 948F  
switches and High−Speed CMOS analog switches.  
Features  
1
Select Pins Compatible with TTL Levels  
Fast Switching and Propagation Speeds  
Low Crosstalk Between Switches  
16  
1
Analog Power Supply Range (V − V ) = *3.0 V to )3.0 V  
CC  
EE  
SOEIAJ−16  
M SUFFIX  
CASE 966  
Digital (Control) Power Supply Range (V − GND) = 2.5 to 6.0 V  
LVXT4051  
ALYW  
CC  
Improved Linearity and Lower ON Resistance Than Metal−Gate,  
HSL, or VHC Counterparts  
Low Noise  
Designed to Operate on a Single Supply with V = GND, or Using  
EE  
A
=
=
=
=
Assembly Location  
Wafer Lot  
Year  
Split Supplies up to $ 3.0 V  
Break−Before−Make Circuitry  
Pb−Free Packages are Available*  
WL or L  
Y
WW or W  
Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
March, 2005 − Rev. 4  
MC74LVXT4051/D  

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