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MC74LVXC3245DTG PDF预览

MC74LVXC3245DTG

更新时间: 2024-11-15 12:02:43
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
9页 137K
描述
Configurable Dual Supply Octal Transceiver

MC74LVXC3245DTG 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:TSSOP包装说明:TSSOP, TSSOP24,.25
针数:24Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.79Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:225493
Samacsys Pin Count:24Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:TSSOP24 DT CASE 948H ISSUE B
Samacsys Released Date:2015-08-11 07:59:12Is Samacsys:N
其他特性:3.3V SUPPLY FOR PORT A; 5V SUPPLY FOR PORT B控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G24JESD-609代码:e4
长度:7.8 mm逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:RAIL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5/3.3,3.3/5 V
Prop。Delay @ Nom-Sup:9 ns传播延迟(tpd):9 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:3V & 3/5V宽度:4.4 mm
Base Number Matches:1

MC74LVXC3245DTG 数据手册

 浏览型号MC74LVXC3245DTG的Datasheet PDF文件第2页浏览型号MC74LVXC3245DTG的Datasheet PDF文件第3页浏览型号MC74LVXC3245DTG的Datasheet PDF文件第4页浏览型号MC74LVXC3245DTG的Datasheet PDF文件第5页浏览型号MC74LVXC3245DTG的Datasheet PDF文件第6页浏览型号MC74LVXC3245DTG的Datasheet PDF文件第7页 
MC74LVXC3245  
Configurable Dual Supply  
Octal Transceiver  
with 3State Outputs for 3 V Systems  
The 74LVXC3245 is a 24pin dualsupply, octal configurable  
voltage interface transceiver especially well suited for PCMCIA and  
http://onsemi.com  
MARKING  
other real time configurable I/O applications. The V  
pin accepts a  
CCA  
3.0 V supply level; the A port is a dedicated 3.0 V port. The V  
pin  
CCB  
DIAGRAMS  
accepts a 3.0 Vto5.0 V supply level. The B port is configured to  
track the V supply level. A 5.0 V level on the V pin will  
24  
CCB  
CCB  
configure the I/O pins at a 5.0 V level and a 3.0 V V  
the I/O pins at a 3.0 V level. The A port interfaces with a 3.0 V host  
system and the B port to the card slots. This device will allow the  
will configure  
CCB  
24  
SOIC24  
DW SUFFIX  
CASE 751E  
LVXC3245  
AWLYYWWG  
1
V
CCB  
voltage source pin and I/O pins on the B port to float when OE is  
High. This feature is necessary to buffer data to and from a PCMCIA  
socket that permits PCMCIA cards to be inserted and removed during  
normal operation. The Transmit/Receive (T/R) input determines the  
direction of data flow. Transmit (activeHigh) enables data from the A  
port to B port. Receive (activeLow) enables data from the B port to  
the A port.  
1
24  
LVXC  
3245G  
ALYW  
24  
TSSOP24  
DT SUFFIX  
CASE 948H  
1
Features  
1
Bidirectional Interface Between 3.0 V and 3.0 V/5.0 V Buses  
Control Inputs Compatible with TTL Level  
Outputs Source/Sink Up to 24 mA  
LVXC3245 = Specific Device Code  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
= Year  
Guaranteed Simultaneous Switching Noise Level and Dynamic  
WW, W  
G or G  
= Work Week  
= PbFree Package  
Threshold Performance  
Available in SOIC and TSSOP Packages  
(Note: Microdot may be in either location)  
Flexible V  
Operating Range  
CCB  
Allows B Port and V  
to Float Simultaneously When OE is High  
CCB  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
Functionally Compatible With the 74 Series 245  
These Devices are PbFree and are RoHS Compliant  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
May, 2011 Rev. 6  
MC74LVXC3245/D  

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