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MC74LVX4245DWG

更新时间: 2024-01-07 19:51:32
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
10页 138K
描述
Dual Supply Octal Translating Transceiver

MC74LVX4245DWG 数据手册

 浏览型号MC74LVX4245DWG的Datasheet PDF文件第2页浏览型号MC74LVX4245DWG的Datasheet PDF文件第3页浏览型号MC74LVX4245DWG的Datasheet PDF文件第4页浏览型号MC74LVX4245DWG的Datasheet PDF文件第5页浏览型号MC74LVX4245DWG的Datasheet PDF文件第6页浏览型号MC74LVX4245DWG的Datasheet PDF文件第7页 
MC74LVX4245  
Dual Supply Octal  
Translating Transceiver  
with 3State Outputs  
The 74LVX4245 is a 24pin dualsupply, octal translating  
transceiver that is designed to interface between a 5.0 V bus and a 3.0 V  
bus in a mixed 3.0 V / 5.0 V supply environment such as laptop  
computers using a 3.3 V CPU and 5.0 V LCD display. The A port  
interfaces with the 5V bus; the B port interfaces with the 3.0 V bus.  
The Transmit/Receive (T/R) input determines the direction of data  
flow. Transmit (activeHigh) enables data from the A port to the B  
port. Receive (activeLow) enables data from the B port to the A port.  
The Output Enable (OE) input, when High, disables both A and B  
ports by placing them in 3State.  
http://onsemi.com  
MARKING  
DIAGRAMS  
24  
24  
SOIC24  
DW SUFFIX  
CASE 751E  
LVX4245  
AWLYYWWG  
1
1
Features  
Bidirectional Interface Between 5.0 V and 3.0 V Buses  
Control Inputs Compatible with TTL Level  
24  
LVX  
4245G  
ALYW  
24  
TSSOP24  
DT SUFFIX  
CASE 948H  
5.0 V Data Flow at A Port and 3.0 V Data Flow at B Port  
Outputs Source/Sink 24 mA at 5.0 V Bus and 12 mA at 3.0 V Bus  
1
Guaranteed Simultaneous Switching Noise Level and Dynamic  
1
Threshold Performance  
Available in SOIC and TSSOP Packages  
Functionally Compatible with the 74 Series 245  
These Devices are PbFree and are RoHS Compliant  
LVX4245 = Specific Device Code  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
= Year  
WW, W  
G or G  
= Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
V
V
OE B0  
B1  
20  
B2  
19  
B3  
18  
B4  
17  
B5  
16  
B6  
15  
B7 GND  
14  
CCB  
CCB  
24  
23  
22  
21  
13  
PIN NAMES  
Pins  
Function  
OE  
T/R  
A0A7  
Output Enable Input  
Transmit/Receive Input  
Side A 3State Inputs or 3State  
Outputs  
1
2
3
4
5
6
7
9
11  
8
10  
12  
B0B7  
Side B 3State Inputs or 3State  
Outputs  
V
T/R A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7 GND GND  
CCA  
Figure 1. 24Lead Pinout  
(Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
May, 2011 Rev. 5  
MC74LVX4245/D  

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