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MC74LVX373 PDF预览

MC74LVX373

更新时间: 2024-11-13 22:12:47
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
7页 172K
描述
LOW-VOLTAGE CMOS

MC74LVX373 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74LVX373 is an advanced high speed CMOS octal latch with  
3–state outputs. The inputs tolerate voltages up to 7V, allowing the  
interface of 5V systems to 3V systems.  
This 8–bit D–type latch is controlled by a latch enable input and an  
output enable input. When the output enable input is high, the eight  
outputs are in a high impedance state.  
LOW–VOLTAGE CMOS  
High Speed: t  
= 5.8ns (Typ) at V  
= 3.3V  
PD  
Low Power Dissipation: I  
CC  
= 4µA (Max) at T = 25°C  
CC  
A
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
DW SUFFIX  
20–LEAD SOIC PACKAGE  
CASE 751D–04  
Low Noise: V  
= 0.8V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
DT SUFFIX  
20–LEAD TSSOP PACKAGE  
CASE 948E–02  
V
O7  
19  
D7  
18  
D6  
17  
O6  
16  
O5  
15  
D5  
14  
D4  
13  
O4  
12  
LE  
11  
CC  
20  
M SUFFIX  
20–LEAD SOIC EIAJ PACKAGE  
CASE 967–01  
1
2
3
4
5
6
7
9
8
10  
OE  
O0  
D0  
D1  
O1  
O2  
D2  
D3  
O3  
GND  
PIN NAMES  
Figure 1. 20–Lead Pinout (Top View)  
Pins  
Function  
OE  
LE  
D0–D7  
O0–O7  
Output Enable Input  
Latch Enable Input  
Data Inputs  
3–State Latch Outputs  
6/97  
Motorola, Inc. 1997  
REV 0  

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