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MC74LVX14D PDF预览

MC74LVX14D

更新时间: 2024-02-14 00:41:45
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极逻辑集成电路光电二极管
页数 文件大小 规格书
6页 143K
描述
LOW-VOLTAGE CMOS

MC74LVX14D 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:EIAJ, LEAD FREE, SOIC-14
针数:14Reach Compliance Code:unknown
风险等级:5.66Is Samacsys:N
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:10.2 mm
逻辑集成电路类型:INVERTER湿度敏感等级:NOT SPECIFIED
功能数量:6输入次数:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
传播延迟(tpd):23 ns认证状态:COMMERCIAL
座面最大高度:2.05 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:5.275 mmBase Number Matches:1

MC74LVX14D 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74LVX14 is an advanced high speed CMOS Schmitt inverter.  
The inputs tolerate voltages up to 7V, allowing the interface of 5V systems  
to 3V systems.  
The MC74LVX14 is pin and functionally compatible to the  
MC74LVX04, but the inputs have hysteresis and, with its Schmitt trigger  
function, can be used as a line receiver which will receive slow input  
signals.  
LOW–VOLTAGE CMOS  
High Speed: t  
= 6.8ns (Typ) at V  
= 3.3V  
PD  
Low Power Dissipation: I  
CC  
= 2µA (Max) at T = 25°C  
CC  
A
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
Low Noise: V  
= 0.5V (Max)  
OLP  
D SUFFIX  
14–LEAD SOIC PACKAGE  
CASE 751A–03  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
V
A5  
13  
O5  
12  
A4  
11  
O4  
10  
A3  
9
O3  
8
CC  
DT SUFFIX  
14–LEAD TSSOP PACKAGE  
CASE 948G–01  
14  
1
2
3
4
5
6
7
M SUFFIX  
14–LEAD SOIC EIAJ PACKAGE  
CASE 965–01  
A0  
O0  
A1  
O1  
A2  
O2  
GND  
Figure 1. 14–Lead Pinout (Top View)  
PIN NAMES  
1
2
4
A0  
A1  
A2  
A3  
A4  
A5  
O0  
O1  
O2  
O3  
O4  
O5  
Pins  
Function  
3
An  
On  
Data Inputs  
Outputs  
5
6
FUNCTION TABLE  
An  
9
8
On  
11  
13  
10  
12  
L
H
H
L
Figure 2. Logic Diagram  
6/97  
Motorola, Inc. 1997  
REV 0  

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