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MC74LVX02DR2 PDF预览

MC74LVX02DR2

更新时间: 2024-11-11 05:09:55
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
6页 83K
描述
Quad 2-Input NOR Gate With 5 V−Tolerant Inputs

MC74LVX02DR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.36
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:NOR GATE
最大I(ol):0.004 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:3.3 VProp。Delay @ Nom-Sup:11.5 ns
传播延迟(tpd):17 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

MC74LVX02DR2 数据手册

 浏览型号MC74LVX02DR2的Datasheet PDF文件第2页浏览型号MC74LVX02DR2的Datasheet PDF文件第3页浏览型号MC74LVX02DR2的Datasheet PDF文件第4页浏览型号MC74LVX02DR2的Datasheet PDF文件第5页浏览型号MC74LVX02DR2的Datasheet PDF文件第6页 
MC74LVX02  
Quad 2−Input NOR Gate  
With 5 V−Tolerant Inputs  
The MC74LVX02 is an advanced high speed CMOS 2−input NOR  
gate. The inputs tolerate voltages up to 7.0 V, allowing the interface of  
5.0 V systems to 3.0 V systems.  
http://onsemi.com  
MARKING  
Features  
DIAGRAMS  
High Speed: t = 4.5 ns (Typ) at V = 3.3 V  
PD  
CC  
Low Power Dissipation: I = 2mA (Max) at T = 25°C  
CC  
A
Power Down Protection Provided on Inputs  
14  
Balanced Propagation Delays  
SOIC−14  
D SUFFIX  
CASE 751A  
LVX02  
AWLYWW  
14  
Low Noise: V  
= 0.5 V (Max)  
OLP  
1
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
1
ESD Performance:  
Human Body Model > 2000 V;  
Machine Model > 200 V  
14  
Pb−Free Packages are Available*  
TSSOP−14  
DT SUFFIX  
CASE 948G  
LVX  
02  
ALYW  
14  
1
1
14  
74LVX02  
ALYW  
SOEIAJ−14  
M SUFFIX  
CASE 965  
14  
1
1
A
=
=
=
=
Assembly Location  
Wafer Lot  
Year  
WL or L  
Y
WW or W  
Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
March, 2005 − Rev. 3  
MC74LVX02/D  

MC74LVX02DR2 替代型号

型号 品牌 替代类型 描述 数据表
MC74LVX02DR2G ONSEMI

完全替代

Quad 2-Input NOR Gate With 5 V−Tolerant Inputs

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