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MC74LVQ374DW PDF预览

MC74LVQ374DW

更新时间: 2024-11-24 23:01:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 216K
描述
LOW-VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP

MC74LVQ374DW 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:unknown
风险等级:5.38系列:LVQ
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:125000000 Hz
最大I(ol):0.012 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
Prop。Delay @ Nom-Sup:14.5 ns传播延迟(tpd):16 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

MC74LVQ374DW 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74LVQ374 is a high performance, non–inverting octal D–type  
flip–flop operating from a 2.7 to 3.6V supply. The MC74LVQ374 is  
suitable for TTL level bus oriented applications where a memory element  
is required.  
LVQ  
Current drive capability is 12mA at the outputs. The MC74LVQ374  
consists of 8 edge–triggered flip–flops with individual D–type inputs and  
3–state true outputs. The buffered clock and buffered Output Enable (OE)  
are common to all flip–flops. The eight flip–flops will store the state of  
individual D inputs that meet the setup and hold time requirements on the  
LOW–to–HIGH Clock (CP) transition. With the OE LOW, the contents of  
the eight flip–flops are available at the outputs. When the OE is HIGH, the  
outputs go to the high impedance state. The OE input level does not affect  
the operation of the flip–flops.  
LOW–VOLTAGE CMOS  
OCTAL D–TYPE FLIP–FLOP  
DW SUFFIX  
PLASTIC SOIC  
CASE 751D–04  
20  
Designed for 2.7 to 3.6V V  
Noise Applications  
Operation – Ideal for Low Power/Low  
CC  
1
Guaranteed Simultaneous Switching Noise Level and Dynamic  
Threshold Performance  
Guaranteed Skew Specifications  
M SUFFIX  
PLASTIC SOIC EIAJ  
Guaranteed Incident Wave Switching into 75  
20  
CASE 967–01  
LowStaticSupplyCurrent(10µA)SubstantiallyReducesSystemPower  
1
Requirements  
Latchup Performance Exceeds 500mA  
ESD Performance: Human Body Model >2000V  
SD SUFFIX  
20  
PLASTIC SSOP  
CASE 940C–03  
1
DT SUFFIX  
PLASTIC TSSOP  
20  
Pinout: 20–Lead (Top View)  
CASE 948E–02  
1
V
O7  
19  
D7  
18  
D6  
17  
O6  
16  
O5  
15  
D5  
14  
D4  
13  
O4  
12  
CP  
11  
CC  
20  
PIN NAMES  
Pins  
Function  
OE  
CP  
D0–D7  
O0–O7  
Output Enable Input  
Clock Pulse Input  
Data Inputs  
1
2
3
4
5
6
7
9
8
10  
3–State Outputs  
OE  
O0  
D0  
D1  
O1  
O2  
D2  
D3  
O3  
GND  
12/95  
Motorola, Inc. 1995  
REV 0  

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