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MC74LCX810DTR2 PDF预览

MC74LCX810DTR2

更新时间: 2024-11-06 14:53:15
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管
页数 文件大小 规格书
37页 335K
描述
LVC/LCX/Z SERIES, QUAD 2-INPUT XNOR GATE, PDSO14, PLASTIC, TSSOP-14

MC74LCX810DTR2 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14长度:5 mm
逻辑集成电路类型:XNOR GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

MC74LCX810DTR2 数据手册

 浏览型号MC74LCX810DTR2的Datasheet PDF文件第2页浏览型号MC74LCX810DTR2的Datasheet PDF文件第3页浏览型号MC74LCX810DTR2的Datasheet PDF文件第4页浏览型号MC74LCX810DTR2的Datasheet PDF文件第5页浏览型号MC74LCX810DTR2的Datasheet PDF文件第6页浏览型号MC74LCX810DTR2的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
The MC74LCX810 is a high performance, quad 2–input XNOR gate  
operating from a 2.7 to 3.6V supply. High impedance TTL compatible  
inputs significantly reduce current loading to input drivers while TTL  
compatible outputs offer improved switching noise performance. A V  
specification of 5.5V allows MC74LCX810 inputs to be safely driven from  
5V devices.  
I
LOW–VOLTAGE CMOS  
QUAD 2–INPUT XNOR GATE  
Current drive capability is 24mA at the outputs.  
Designed for 2.7 to 3.6V V  
CC  
Operation  
5V Tolerant Inputs — Interface Capability With 5V TTL Logic  
LVTTL Compatible  
D SUFFIX  
PLASTIC SOIC  
14  
CASE 751A–03  
LVCMOS Compatible  
1
24mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current (10µA) Substantially Reduces System  
Power Requirements  
M SUFFIX  
14  
PLASTIC SOIC EIAJ  
Latchup Performance Exceeds 500mA  
CASE 965–01  
1
ESD Performance: Human Body Model >2000V; Machine Model >200V  
Pinout: 14–Lead (Top View)  
SD SUFFIX  
PLASTIC SSOP  
CASE 940A–03  
14  
V
CC  
A2  
13  
B2  
12  
O2  
11  
A3  
10  
B3  
9
O3  
8
1
14  
DT SUFFIX  
PLASTIC TSSOP  
14  
CASE 948G–01  
1
1
2
3
4
5
6
7
A0  
B0  
O0  
A1  
B1  
O1 GND  
PIN NAMES  
Pins  
Function  
LOGIC DIAGRAM  
An, Bn  
On  
Data Inputs  
Outputs  
1
A0  
3
O0  
2
4
B0  
A1  
FUNCTION TABLE  
Inputs  
6
O1  
5
Outputs  
On  
B1  
A2  
13  
An  
Bn  
11  
O2  
12  
10  
9
L
L
L
H
L
H
L
B2  
A3  
B3  
8
H
H
L
O3  
H
H
This document contains information on a product under development. Motorola reserves the  
right to change or discontinue this product without notice.  
11/96  
REV 0  
146  
Motorola, Inc. 1996  

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