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MC74LCX74SD PDF预览

MC74LCX74SD

更新时间: 2024-11-20 23:05:47
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
9页 149K
描述
LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP

MC74LCX74SD 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74LCX74 is a high performance, dual D–type flip–flop with  
asynchronous clear and set inputs and complementary (O, O) outputs. It  
operates from a 2.7 to 3.6V supply. High impedance TTL compatible  
inputs significantly reduce current loading to input drivers while TTL  
compatible outputs offer improved switching noise performance. A V  
specification of 5.5V allows MC74LCX74 inputs to be safely driven from  
5V devices.  
I
LOW–VOLTAGE CMOS  
DUAL D–TYPE FLIP–FLOP  
The MC74LCX74 consists of 2 edge–triggered flip–flops with  
individual D–type inputs. The flip–flop will store the state of individual D  
inputs, that meet the setup and hold time requirements, on the  
LOW–to–HIGH Clock (CP) transition.  
Designed for 2.7 to 3.6V V  
CC  
Operation  
D SUFFIX  
PLASTIC SOIC  
CASE 751A–03  
14  
5V Tolerant Inputs — Interface Capability With 5V TTL Logic  
LVTTL Compatible  
1
LVCMOS Compatible  
M SUFFIX  
PLASTIC SOIC EIAJ  
24mA Balanced Output Sink and Source Capability  
14  
Near Zero Static Supply Current in All Three Logic States (10µA)  
CASE 965–01  
1
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds 500mA  
SD SUFFIX  
PLASTIC SSOP  
ESD Performance: Human Body Model >2000V; Machine Model >200V  
14  
CASE 940A–03  
1
DT SUFFIX  
PLASTIC TSSOP  
14  
Pinout: 14–Lead (Top View)  
CASE 948G–01  
V
CD2  
13  
D2  
12  
CP2 SD2  
O2  
9
O2  
8
1
CC  
14  
11  
10  
PIN NAMES  
Pins  
Function  
CP1, CP2  
D1, D2  
Clock Pulse Inputs  
Data Inputs  
1
2
3
4
5
6
7
CD1, CD2  
SD1, SD2  
On, On  
Direct Clear Inputs  
Direct Set Inputs  
Outputs  
CD1  
D1  
CP1  
SD1  
O1  
O1  
GND  
11/96  
Motorola, Inc. 1996  
REV 1  
1

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